Datasheet

TMC8462 Datasheet Document Revision V1.5 2019-June-21
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5.4 External Circuitry and Applications Examples
5.4.1 Device Reset
The NRESET signal should at least be connected to VCCIO via a 10K resistor and to GND via a 10nF capacitor
if no other controlled reset source for proper power-on behavior and reset is used.
TMC8462
NRESET
10nF
10k
VCCIO (3.3V)
Figure 18: Minimum external circuit for power-on reset
5.4.2 Supply Filtering for PLL Supply
The internal PLL is supplied with the same 3.3V as used for VCCIO. An R/L/C lter structure as shown in the
circuit diagram is used. PLLCLK_GND is connected to common ground.
TMC8462
TSTCLK_SELECT
VCCIO (3.3V)
PLLCLK_GND
PLLCLK_VCCIO
100nF
1
600 @100MHz
VCCIO (3.3V)
Figure 19: PLL supply lter
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