Datasheet

TMC8462 Datasheet • Document Revision V1.5 • 2019-June-21
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A15 A14 A13 A12 A11 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0A10 C2 C1 C0
Address Command
A12 A11 A9 A8 A7 A6 A5A10 A4 A3 A2 A1 A0
1 1 0
A15 A14 A13 C2 C1 C0
0 0
Byte 0 Byte 1 Byte 2
Address
extension
command
Reserved
Figure 10: PDI SPI 3 byte addressing
Unless highest performance is required, using only the 3-byte addressing mode and the read with wait
state command is recommended since it reduces the need for special cases in the software. During the
address/command bytes, the ESC replies with the contents of the event request registers ( 0x0220 , 0x0221
and in 3 byte addressing mode 0x0222).
Command 0 - NOP
This command can be used for checking the event request registers and resetting the PDI watchdog
without a read or write access.
Example datagram: 0x00 0x00
Example reply (AL Control event bit is set): 0x01 0x00
Command 2 - READ
With the read command, an arbitrary amount of data can be read from the device. The first byte read is
the data from the address given by the address/command bytes. With every read byte, the address is
incremented. During the data transfer, the SPI master sends 0x00 except for the last byte where a 0xFF is
sent.
When using this command, a pause of 240ns or more must be included between the address/command
bytes and the data bytes for the ESC to fetch the requested data.
Example datagram (Read from address 0x0120 and 0x0121): 0x09 0x02 0x00 0xFF
Example reply (Operational State requested): 0x01 0x00 0x08 0x00
Command 3 - READ WITH WAIT STATE BYTE
This command is similar to the Read command with an added dummy byte between the address/command
part and the data part of the datagram. This allows enough time to fetch the data in any case.
Example datagram (Read starting at address 0x3400): 0xA0 0x06 0x2C 0xFF 0x00 0x00 0x00 0xFF
Example reply (0xXX is undefined data): 0x00 0x00 0x00 0xXX 0x44 0x41 0x54 0x41
Command 4 - WRITE
The write command allows writing of an arbitrary number of bytes to writable ESC registers or the process
data RAM. It requires no wait state byte or delay after the address/command bytes. After every transmitted
byte, the address is incremented.
Example datagram (Write starting at address 0x4200): 0x10 0x06 0x50 0x4C 0x48
Example reply (0xXX is undefined data): 0x00 0x00 0x00 0xXX 0xXX
Address 0x4200 now contains 0x4C, Address 0x4201 contains 0x48
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