Datasheet

TMC8462 Datasheet • Document Revision V1.5 • 2019-June-21
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Name Pin Type (I,O,PU,PD) Function
Bus Interface 1 IOs (EtherCAT OUT Port)
TN1 K1 IO Negative pin of differential transmit output pair
TP1 L1 IO Positive pin of differential transmit output pair
RN1 G1 IO Negative pin of differential receive output pair
RP1 H1 IO Positive pin of differential receive output pair
REGOUT1 L2 O Regulator power output, use a 10uF and 0.1uF
for filtering power noise
Test Pins only
TST_MODE E5 I Test mode enable, connect to GND
TST_ANA D5 O Analog test output, leave open
RXCLK0 D2 IO Clock test pin, leave open
RXCLK1 G2 IO Clock test pin, leave open
TXCLK0 E2 IO Clock test pin, leave open
TXCLK1 H2 IO Clock test pin, leave open
RXDV0 B2 I, PD Test pin, leave open for normal operation
RXDV1 K2 I, PD Test pin, leave open for normal operation
TXER0 C2 I, PD Test pin, leave open for normal operation
TXER1 J2 I, PD Test pin, leave open for normal operation
CLKO_100 L6 O 100MHz clock output
Table 2: Pin and Signal description for TMC8462-BA
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