Datasheet

TMC8462 Datasheet • Document Revision V1.5 • 2019-June-21
201 / 204
13 Tables Index
1 TMC8462 order codes . . . . . . . . . 6
2 Pin and Signal description for
TMC8462-BA . . . . . . . . . . . . . . . 22
3 PDI signal description . . . . . . . . . . 24
4 PDI SPI commands . . . . . . . . . . . 24
5 MFC CTRL SPI signal description . . . 27
6 Physical bus interface pin description 30
7 Available EtherCAT Chip Features (0 =
not available/disabled, 1 =
available/enabled . . . . . . . . . . . . 42
8 TMC8462 EtherCAT Registers . . . . . 48
9 Register 0x0000 (Type) . . . . . . . . . 49
10 Register 0x0001 (Revision) . . . . . . . 49
11 Register 0x0002 (Build) . . . . . . . . . 49
12 Register 0x0004 (FMMUs) . . . . . . . 50
13 Register 0x0005 (SMs) . . . . . . . . . 50
14 Register 0x0006 (RAM Size) . . . . . . 50
15 Register 0x0007 (Port Descriptor) . . . 51
16 Register 0x0008:0x0009 (ESC Features) 52
17 Register 0x0010:0x0011 (Station Addr) 53
18 Register 0x0012:0x0013 (Station Alias) 53
19 Register 0x0020 (Write Register Enable) 54
20 Register 0x0021 (Write Register Prot.) 54
21 Register 0x0030 (ESC Write Enable) . . 54
22 Register 0x0031 (ESC Write Prot.) . . . 55
23 Register 0x0040 (ESC Reset ECAT) . . . 56
24 Register 0x0041 (ESC Reset PDI) . . . 56
25 Register 0x0100:0x0103 (DL Control) . 58
26 Register 0x0108:0x0109 (R/W Offset) . 58
27 Register 0x0110:0x0111 (DL Status) . 60
28 Decoding port state in ESC DL Status
register 0x0111 (typical modes only) . 60
29 Register 0x0120:0x0121 (AL Cntrl) . . 61
30 Register 0x0130:0x0131 (AL Status) . 62
31 Register 0x0134:0x0135 (AL Status
Code) . . . . . . . . . . . . . . . . . . . 62
32 Register 0x0138 (RUN LED Override) . 63
33 Register 0x0139 (ERR LED Override) . 63
34 Register 0x0140 (PDI Control) . . . . . 64
35 Register 0x0141 (ESC Config) . . . . . 64
36 Register 0x014E (PDI Information)) . . 65
37 Register 0x0150 (PDI SPI CFG) . . . . . 66
38 Register 0x0151 (SYNC/LATCH CFG) . 67
39 Register 0x0152:0x0153 (PDI SPI extCFG) 67
40 Register 0x0200:0x0201 (ECAT Event M.) 68
41 Register 0x0204:0x0207 (AL Event Mask) 68
42 Register 0x0210:0x0211 (ECAT Event R.) 69
43 Register 0x0220:0x0223 (AL Event R.) 70
44 Register 0x0300:0x0307 (RX Err Cnt) . 71
45 Register 0x0308:0x030B (FW RX Err Cnt) 71
46 Register 0x030C (Proc. Unit Err Cnt) . 71
47 Register 0x030D (PDI Err Cnt) . . . . . 72
48 Register 0x030E (PDI Err Code) . . . . 72
49 Register 0x0310:0x0313 (LL Counter) 73
50 Register 0x0400:0x0401 (WD Divider) 74
51 Register 0x0410:0x0411 (WD Time PDI) 74
52 Register 0x0420:0x0421 (WD Time PD) 74
53 Register 0x0440:0x0441 (WD Status PD) 75
54 Register 0x0442 (WD Counter PD) . . 75
55 Register 0x0443 (WD Counter PDI) . . 76
56 SII EEPROM Interface Register Overview 77
57 Register 0x0500 (PROM Config) . . . . 77
58 Register 0x0501 (PROM PDI Access) . 77
59 Register 0x0502:0x0503 (PROM Cntrl) 79
60 Register 0x0504:0x0507 (PROM Address) 79
61 Register 0x0508:0x050F (PROM Data) 80
62 Register 0x0580:0x05E1 (MFC IO Config) 81
63 MII Management Interface Register
Overview . . . . . . . . . . . . . . . . . 82
64 Register 0x0510:0x0511 (MI Cntrl/State) 83
65 Register 0x0512 (PHY Address) . . . . 83
66 Register 0x0513 (PHY Register Address) 84
67 Register 0x0514:0x0515 (PHY Data) . 84
68 Register 0x0516 (MI ECAT State) . . . . 84
69 Register 0x0517 (MI PDI State) . . . . 85
70 Register 0x0518+y (PHY Port Status) . 85
71 FMMU Register Overview . . . . . . . 86
72 Register 0x06y0:0x06y3 (Log Start Addr) 86
73 Register 0x06y4:0x06y5 (FMMU Length) 86
74 Register 0x06y6 (Log. Start Bit) . . . . 87
75 Register 0x06y7 (Log. Stop Bit)) . . . . 87
76 Register 0x06y8:0x06y9 (Phy. Start Addr 87
77 Register 0x06yA (Phy. Start Bit) . . . . 87
78 Register 0x06yB (FMMU Type) . . . . . 88
79 Register 0x06yC (FMMU Activate) . . . 88
80 Register 0x06yD:0x06yF (Reserved) . . 88
81 SyncManager Register Overview . . . 89
82 Register 0x0800+y*8:0x0801+y*8 (Phy.
Start Addr) . . . . . . . . . . . . . . . . 89
83 Register 0x0802+y*8:0x0803+y*8 (SM
Length) . . . . . . . . . . . . . . . . . . 89
84 Register 0x0804+y*8 (SM Control) . . 90
85 Register 0x0805+y*8 (SM Status) . . . 91
86 Register 0x0806+y*8 (SM Activate) . . 91
87 Register 0x0807+y*8 (SM PDI Control) 92
88 Register 0x0900:0x0903 (Rcv Time P0) 93
89 Register 0x0904:0x0907 (Rcv Time P1) 93
90 Register 0x0910:0x0917 (System Time) 94
91 Register 0x0918:0x091F (Rcv Time EPU) 94
92 Register 0x0920:0x0927 (Sys Time
Offset) . . . . . . . . . . . . . . . . . . . 95
93 Register 0x0928:0x092B (Sys Time
Delay) . . . . . . . . . . . . . . . . . . . 95
94 Register 0x092C:0x092F (Sys Time Diff) 95
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