Datasheet
TMC8462 Datasheet • Document Revision V1.5 • 2019-June-21
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Name Pin Type (I,O,PU,PD) Function
Process Data Interface IOs to/from MCU
PDI_SOF H3 O Ethernet Start-of-Frame if 1
PDI_EOF G3 O Ethernet End-of-Frame if 1
PDI_SPI_CSN L4 I Chip select signal of the process data interface
PDI_SPI_SCK K3 I Serial clock signal of the process data interface
PDI_SPI_MOSI L5 I
Serial data out signal of the process data inter-
face
PDI_SPI_MISO K5 O
Serial data in signal of the process data interface
PDI_SPI_IRQ J3 O
Interrupt signal for primary process data inter-
face, connect to MCU
PDI_WDSTATE G4 O
EtherCAT Watchdog state, 0: Expired, 1: Not ex-
pired
PDI_WDTRIGGER F4 O EtherCAT Watchdog trigger if 1
PDI_EMULATION J7 I
Selects between PDI interface (SPI) or standalone
operation with state machine emulation inside
ESC. Has weak internal pull down. 0 = default,
PDI interface active, 1 = standalone operation,
state machine emulation in Slave Controller
MFC IO Control Interface IOs
MFC_CTRL_SPI_CSN D4 I
Chip select signal of the MFC IO control interface
MFC_CTRL_SPI_SCK E4 I
Serial clock signal of the MFC IO control interface
MFC_CTRL_SPI_MOSI C4 I
Serial data out signal of the MFC IO control inter-
face
MFC_CTRL_SPI_MISO E7 O
Serial data in signal of the MFC IO control inter-
face
MFC_IRQ E6 O
MFCIO block IRQ for configurable events, connect
to MCU, high active
MFC_NES C5 I
low active (not) Emergency Stop/Switch/Halt (to
bring PWM or other outputs into a safe state),
the event must be cleared actively, has weak in-
ternal pull down, must be driven high for normal
operation
PDI_SHARED_BUS F9 I
Selects between separate SPI buses (MISO, MOSI,
SCK) or one SPI bus with two CS lines for the PDI
and MFC CTRL SPI interface: 0 = two separate SPI
buses, 1 = one shared SPI bus using the PDI_SPI_x
bus lines
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