Datasheet

TMC8462 Datasheet Document Revision V1.5 2019-June-21
178 / 204
7.16 MFC IO DAC Block
The DAC block generates a digital signal based on a 16 bit pseudo random number generator (PRNG). A
pseudo random number (PRN) is compared to the desired output value and a the output is set to 1 if the
PRN is lower than the output value. The PRN generator is clocked with 100MHz, which results in a period
length of 655.36µs. The output signal can be ltered with a simple RC lowpass.
MFCIO[x]
10k
100nF
out
Figure 46: RC lter for DAC output with example values
Note
The high voltage outputs are not able to output this signal properly as their
slew rate does not allow 10ns pulses. This will lead to voltage levels that dont
correspond with the set value. It is recommended to use the DAC block only with
the low voltage outputs.
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