Datasheet

TMC8462 Datasheet • Document Revision V1.5 • 2019-June-21
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Bit Description ECAT PDI Range [Unit]
15:12 unused -/w -/w
Table 166: MFC IO Register 41 – PWM1_CNTRSHFT
7.3.5.7 Register 42 – PWM2_CNTRSHFT
Bit Description ECAT PDI Range [Unit]
11:0 Shift value for PWM2 to shift PWM2 high side
and low side signal edges with respect to the
aligned PWM counter.
-/w -/w 0. . . +(2
12
) − 1
15:12 unused -/w -/w
Table 167: MFC IO Register 42 – PWM2_CNTRSHFT
7.3.5.8 Register 43 – PWM3_CNTRSHFT
Bit Description ECAT PDI Range [Unit]
11:0 Shift value for PWM3 to shift PWM3 high side
and low side signal edges with respect to the
aligned PWM counter.
-/w -/w 0. . . +(2
12
) − 1
15:12 unused -/w -/w
Table 168: MFC IO Register 43 – PWM3_CNTRSHFT
7.3.5.9 Register 44 – PWM4_CNTRSHFT
Bit Description ECAT PDI Range [Unit]
11:0 Shift value for PWM4 to shift PWM4 high side
and low side signal edges with respect to the
aligned PWM counter.
-/w -/w 0. . . +(2
12
) − 1
15:12 unused -/w -/w
Table 169: MFC IO Register 44 – PWM4_CNTRSHFT
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