Datasheet

TMC8462 Datasheet • Document Revision V1.5 • 2019-June-21
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7.3.4.11 Register 28 – SD_CH1_COMPARE
Bit Description ECAT PDI Range [Unit]
31:0 Comparison value to compare with actual value
of SD_CH1_STEPCOUNT.
When both are equal and bit 6 in SD_CFG
is set, the next step rate as configured in
SD_CH1_NEXTSR will be assigned and used for
SD_CH1_SR.
-/w -/w −2
31
. . . +(2
31
) − 1
Table 153: MFC IO Register 28 – SD_CH1_COMPARE
7.3.4.12 Register 29 – SD_CH2_COMPARE
Bit Description ECAT PDI Range [Unit]
31:0 Comparison value to compare with actual value
of SD_CH2_STEPCOUNT.
When both are equal and bit 6 in SD_CFG
is set, the next step rate as configured in
SD_CH2_NEXTSR will be assigned and used for
SD_CH2_SR.
-/w -/w −2
31
. . . +(2
31
) − 1
Table 154: MFC IO Register 29 – SD_CH2_COMPARE
7.3.4.13 Register 30 – SD_CH0_NEXTSR
Bit Description ECAT PDI Range [Unit]
31:0 Next accumulation constant that will be written
to SD_CH0_STEPRATE at compare event.
-/w -/w 0. . . +(2
32
) − 1
Table 155: MFC IO Register 30 – SD_CH0_NEXTSR
7.3.4.14 Register 31 – SD_CH1_NEXTSR
Bit Description ECAT PDI Range [Unit]
31:0 Next accumulation constant that will be written
to SD_CH1_STEPRATE at compare event.
-/w -/w 0. . . +(2
32
) − 1
Table 156: MFC IO Register 31 – SD_CH1_NEXTSR
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