Datasheet

TMC8462 Datasheet • Document Revision V1.5 • 2019-June-21
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6.4.18.5 SYNC1 Status (0x098F)
Bit Description ECAT PDI Reset Value
0 SYNC1 activation state:
0: First SYNC1 pulse is not pending
1: First SYNC1 pulse is pending
r/- r/
(w
ack)*
0
7:1 Reserved r/- r/
(w
ack)*
0
Table 104: Register 0x098F (SYNC1 Status)
* PDI register function acknowledge by Write command is disabled: Reading this register from PDI clears
AL Event Request 0x0220.3. Writing to this register from PDI is not possible.
PDI register function acknowledge by Write command is enabled: Writing this register from PDI clears AL
Event Request 0x0220.3. Writing to this register from PDI is possible; write value is ignored (write 0).
6.4.18.6 Start Time Cyclic Operation / Next SYNC0 Pulse (0x0990:0x0997)
Bit Description ECAT PDI Reset Value
63:0 Write: Start time (System time) of cyclic opera-
tion in ns
Read: System time of next SYNC0 pulse in ns
r/(w) r/(w) 0
Table 105: Register 0x0990:0x0997 (Start Time Cyclic Operation)
Note
Write to this register depends upon setting of 0x0980.0 . Only writable if
0x0981.0 =0. Auto-activation ( 0x0981.3 =1): upper 32 bits are automatically ex-
tended if only lower 32 bits are written within one frame.
6.4.18.7 Next SYNC1 Pulse (0x0998:0x099F)
Bit Description ECAT PDI Reset Value
63:0 System time of next SYNC1 pulse in ns r/- r/- 0
Table 106: Register 0x0998:0x099F (Next SYNC1)
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