Datasheet

TMC8460-BI Datasheet (V100 / 2016-Sep-01)
Copyright © 2016 TRINAMIC Motion Control GmbH & Co. KG 80
5.45.1 EEPROM emulation with TMC8460
Write access to EEPROM Data register 0x0508:0x050F is possible if EEPROM interface is busy
(0x0502.15=1). PDI places EEPROM read data in this register before the pending EEPROM Read
command is acknowledged (writing to 0x0502[10:8]). For Reload command: place the following
information in the EEPROM Data register before acknowledging the command. This data is
automatically transferred to the designated registers when the Reload command is acknowledged:
Table 65: Register EEPROM Data for EEPROM Emulation Reload (0x0508:0x050F)
Bit
Description
ECAT PDI Reset Value
15:0
Configured Station Alias
(reloaded into 0x0012[15:0])
r/- r/[w] 0
16
Enhanced Link Detection for all ports
(reloaded into 0x0141[1])
r/- r/[w] 0
20:17
Enhanced Link Detection for individual ports
(reloaded into 0x0141[7:4])
r/- r/[w] 0
24:21
ESC DL configuration
(loaded into register 0x0100[23:20])
NOTE: This value is only taken over at the first
EEPROM loading
r/-
r/[w] 0
27:25
FIFO Size reduction (loaded into register
0x0100[18:16]:
000: FIFO Size 7
001: FIFO Size 6
010: FIFO Size 5
011: FIFO Size 4
100: FIFO Size 3
101: FIFO Size 2
110: FIFO Size 1
111: FIFO Size 0
NOTE: This value is only taken over at the first
EEPROM loading
r/-
r/[w] 0
31:28
Reserved, write 0
r/-
r/[w] 0
NOTE: r/[w]: write access for EEPROM emulation if read or reload command is pending.
5.46 MII Management Interface (0x0510:0x0515)
Table 66: MII Management Interface Register Overview
Register Address
Length
(Byte)
Description
0x0510:0x0511
2
MII Management Control/Status
0x0512
1
PHY Address
0x0513
1
PHY Register Address
0x0514:0x0515
2
PHY Data
0x0516
1
MII Management ECAT Access State
0x0517
1
MII Management PDI Access State
0x0518:0x051B
4
PHY Port Status