Datasheet

TMC8460-BI Datasheet (V100 / 2016-Sep-01)

Bit

Description

ECAT PDI Reset Value

SPI access which caused last PDI Error. r/- r/- 0

2:0 Number of SPI clock cycles of whole access

(modulo 8)

3 Busy violation during read access

4 Read termination missing

5 Access continued after read termination byte

7:6 SPI command CMD[2:1]

NOTE: Error Counter 0x030D and Error Code 0x030E are cleared if error counter 0x030D is written. Write value is

ignored (write 0).

5.38 Lost Link Counter (0x0310:0x0313)

Table 52: Register Lost Link Counter Port y (0x0310+y)

Bit

Description

ECAT PDI Reset Value

7:0 Lost Link counter of Port y (counting is

stopped when 0xff is reached). Counts only if

port loop is Auto.

w(clr)

r/- 0

NOTE: Only lost links at open ports are counted. Lost Link Counters 0x0310-0x0313 are cleared if one of the Lost

Link Counters 0x0310-0x0313 is written. Write value is ignored (write 0).

5.39 Watchdog Divider (0x0400:0x0401)

Table 53: Register Watchdog Divider (0x0400:0x0401)

Bit

Description

ECAT PDI Reset Value

15:0 Watchdog divider: Number of 25 MHz tics

(minus 2) that represents the basic watchdog

increment. (Default value is 100µs = 2498)

r/w r/- 0x09C2

5.40 Watchdog Time PDI (0x0410:0x0411)

Table 54: Register Watchdog Time PDI (0x0410:0x0411)

Bit

Description

ECAT PDI Reset Value

15:0 Watchdog Time PDI: number or basic

watchdog increments

(Default value with Watchdog divider 100µs

means 100ms Watchdog)

r/w r/- 0x03E8

Watchdog is disabled if Watchdog time is set to 0x0000. Watchdog is restarted with every PDI access.

5.41 Watchdog Time Process Data (0x0420:0x0421)

Table 55: Register Watchdog Time Process Data (0x0420:0x0421)