Datasheet

TMC8460-BI Datasheet (V100 / 2016-Sep-01)
Copyright © 2016 TRINAMIC Motion Control GmbH & Co. KG 58
Bit
Description
ECAT PDI Reset Value
7
Separate Handling of FCS Errors:
0: Not supported
1: Supported, frames with wrong FCS and
additional nibble will be counted
separately in Forwarded RX Error
Counter
r/-
r/-
TMC8460: 1
8
Enhanced DC SYNC Activation
0: Not available
1: Available
NOTE: This feature refers to registers 0x981[7:3],
0x0984
r/-
r/-
TMC8460: 1
9
EtherCAT LRW command support:
0: Supported
1: Not supported
r/-
r/-
TMC8460: 0
10
EtherCAT read/write command support (BRW,
APRW, FPRW):
0: Supported
1: Not supported
r/-
r/-
TMC8460: 0
11
Fixed FMMU/SyncManager configuration
0: Variable configuration
1: Fixed configuration (refer to
documentation of supporting ESCs)
r/-
r/-
TMC8460: 0
15:12
Reserved
r/-
r/-
TMC8460: 0
5.9 Configured Station Address (0x0010:0x0011)
Table 20: Register Configured Station Address (0x0010:0x0011)
Bit
Description
ECAT PDI Reset Value
15:0
Address used for node addressing (FPxx
commands)
r/w
r/- 0
5.10 Configured Station Alias (0x0012:0x0013)
Table 21: Register Configured Station Alias (0x0012:0x0013)
Bit
Description
ECAT PDI Reset Value
15:0
Alias Address used for node addressing (FPxx
commands).
The use of this alias is activated by Register
DL Control Bit 24 (0x0100.24/0x0103.0)
NOTE: EEPROM value is only taken over at first
EEPROM load after power-on or reset.
r/-
r/w
0 until first EEPROM
load, then EEPROM ADR
0x0004