Datasheet
TMC8460-BI Datasheet (V100 / 2016-Sep-01)
Copyright © 2016 TRINAMIC Motion Control GmbH & Co. KG 37
C
OMMAND
3
–
R
EAD WITH WAIT STATE BYTE
This command is similar to the Read command with an added dummy byte between the
address/command part and the data part of the datagram. This allows enough time to fetch the data
in any case.
Example datagram (Read starting at address 0x3400):
0xA0 0x06 0x2C 0xFF 0x00 0x00 0x00 0xFF
Example reply (0xXX is undefined data):
0x00 0x00 0x00 0xXX 0x44 0x41 0x54 0x41
C
OMMAND
4
–
W
RITE
The write command allows writing of an arbitrary number of bytes to writable ESC registers or the
process data RAM. It requires no wait state byte or delay after the address/command bytes. After every
transmitted byte, the address is incremented.
Example datagram (Write starting at address 0x4200):
0x10 0x06 0x50 0x4C 0x48
Example reply (0xXX is undefined data):
0x00 0x00 0x00 0xXX 0xXX
Address 0x4200 now contains 0x4C, Address 0x4201 contains 0x48
C
OMMAND
6
–
A
DDRESS EXTENSION
The address extension command is mainly used for the 3-byte addressing mode as shown in Figure 12.
For SPI masters that can only process datagrams with an even number of bytes, it might be necessary
to pad the datagram. This can be achieved by duplicating the third byte of the 3-byte address/command
part and using the address extension command in all but the last duplicate.
For example, a SPI master that is only capable of transmitting a multiple of 4 bytes cannot use the
example datagram for a write access above since it contains 5 bytes. With three added padding bytes,
the master has to transmit two 4-byte groups.
Example datagram (Write starting at address 0x4200):
0x10 0x06 0x58 0x58 0x58 0x50 0x4C 0x48
Example reply (0xXX is undefined data):
0x00 0x00 0x00 0xXX 0xXX 0xXX 0xXX 0xXX