Datasheet

TMC8460-BI Datasheet (V100 / 2016-Sep-01)

PDI_SPI_SCK

TMC8460

PDI_SPI_CSN

PDI_SPI_MOSI

PDI_SPI_MISO

PDI_IRQ

PDI_SOF

PDI_EOF

PDI_EMULATION

PDI_WD_STATE

PDI_WD_TRIGGER

Figure 10 - PDI SPI Interface Signals

Table 2 : PDI SPI interface signal description and connection

TMC8460 pin Usage/description Typical µC pin name

PDI_SPI_SCK SPI master clock SCK

PDI_SPI_CSN SPI chip select for the TMC8460 PDI SSx

PDI_SPI_MOSI Master out slave in data MOSI

PDI_SPI_MISO Master in slave out data MISO

PDI_IRQ Configurable IRQ from PDI General purpose IO

PDI_EMULATION 0: default mode for complex slaves, state machine

changes processed in microcontroller firmware

(SSC)

1: device emulation mode for, e.g., simple slaves,

state machine changes directly handled in the ESC

General purpose IO or

connected to either

ground or 3.3V.

PDI_SOF Indicates start of an Ethernet/EtherCAT frame

(MII_RXDV = ‘1’)

General purpose IO

PDI_EOF Indicates start of an Ethernet/EtherCAT frame General purpose IO

PDI_WD_STATE 0: Watchdog expired

1: Watchdog not expired

General purpose IO

PDI_WD_TRIGGER Watchdog triggered if ‘1’ General purpose IO

3.5.1 SPI protocol description

Each SPI datagram contains a 2- or 3-byte address/command part and a data part. For addresses below

0x2000, the 2-byte addressing mode can be used, the 3 byte addressing mode can be used for all

addresses.

Table 3 : PDI-SPI commands

C2 C1 C0 Command

0 0 0 NOP (no operation, no following data bytes)

0 0 1 Reserved

0 1 0 Read

0 1 1 Read with wait state byte