Datasheet
TMC8460-BI Datasheet (V100 / 2016-Sep-01)
Copyright © 2016 TRINAMIC Motion Control GmbH & Co. KG 3
3.12.1
Example layout of the TMC8460-Eval
............................................................................................... 49
3.13
S
OLDERING
P
ROFILE
............................................................................................................................................... 50
4
ETHERCAT ADDRESS SPACE OVERVIEW ............................................................................................................. 51
5
ETHERCAT REGISTER DESCRIPTION .................................................................................................................... 56
5.1
T
YPE
(0
X
0000) ....................................................................................................................................................... 56
5.2
R
EVISION
(0
X
0001) ............................................................................................................................................... 56
5.3
B
UILD
(0
X
0002:0
X
0003) ....................................................................................................................................... 56
5.4
FMMU
S SUPPORTED
(0
X
0004) .............................................................................................................................. 56
5.5
S
YNC
M
ANAGERS SUPPORTED
(0
X
0005) ................................................................................................................ 56
5.6
RAM
S
IZE
(0
X
0006) .............................................................................................................................................. 56
5.7
P
ORT
D
ESCRIPTOR
(0
X
0007)................................................................................................................................. 57
5.8
ESC
F
EATURES SUPPORTED
(0
X
0008:0
X
0009) ..................................................................................................... 57
5.9
C
ONFIGURED
S
TATION
A
DDRESS
(0
X
0010:0
X
0011) ............................................................................................ 58
5.10
C
ONFIGURED
S
TATION
A
LIAS
(0
X
0012:0
X
0013) ................................................................................................. 58
5.11
W
RITE
R
EGISTER
E
NABLE
(0
X
0020) ..................................................................................................................... 59
5.12
W
RITE
R
EGISTER
P
ROTECTION
(0
X
0021) ............................................................................................................. 59
5.13
ESC
W
RITE
E
NABLE
(0
X
0030) .............................................................................................................................. 59
5.14
ESC
W
RITE
P
ROTECTION
(0
X
0031) ...................................................................................................................... 60
5.15
ESC
R
ESET
ECAT
(0
X
0040) .................................................................................................................................. 60
5.16
ESC
R
ESET
PDI
(0
X
0041) .................................................................................................................................... 60
5.17
ESC
DL
C
ONTROL
(0
X
0100:0
X
0103) ................................................................................................................... 61
5.18
P
HYSICAL
R
EAD
/W
RITE
O
FFSET
(0
X
0108:0
X
0109) ............................................................................................. 62
5.19
ESC
DL
S
TATUS
(0
X
0110:0
X
0111) ...................................................................................................................... 63
5.20
AL
C
ONTROL
(0
X
0120:0
X
0121) ............................................................................................................................ 65
5.21
AL
S
TATUS
(0
X
0130:0
X
0131) .............................................................................................................................. 65
5.22
AL
S
TATUS
C
ODE
(0
X
0134:0
X
0135) .................................................................................................................... 66
5.23
RUN
LED
O
VERRIDE
(0
X
0138) ............................................................................................................................. 66
5.24
ERR
LED
O
VERRIDE
(0
X
0139) .............................................................................................................................. 66
5.25
PDI
C
ONTROL
(0
X
0140) ....................................................................................................................................... 67
5.26
ESC
C
ONFIGURATION
(0
X
0141) ............................................................................................................................ 68
5.27
PDI
I
NFORMATION
(0
X
014E:0
X
014F) ................................................................................................................. 69
5.28
PDI
C
ONFIGURATION
(0
X
0150:0
X
0153) ............................................................................................................. 69
5.28.1
PDI SPI Slave Configuration
............................................................................................................... 69
5.28.2
Sync/Latch[1:0] PDI Configuration
.................................................................................................... 70
5.29
ECAT
E
VENT
M
ASK
(0
X
0200:0
X
0201) ................................................................................................................. 71
5.30
PDI
AL
E
VENT
M
ASK
(0
X
0204:0
X
0207) .............................................................................................................. 71
5.31
ECAT
E
VENT
R
EQUEST
(0
X
0210:0
X
0211) ............................................................................................................ 72
5.32
AL
E
VENT
R
EQUEST
(0
X
0220:0
X
0223) ................................................................................................................. 72
5.33
RX
E
RROR
C
OUNTER
(0
X
0300:0
X
0307) ................................................................................................................ 74
5.34
F
ORWARDED
RX
E
RROR
C
OUNTER
(0
X
0308:0
X
030B) ......................................................................................... 74
5.35
ECAT
P
ROCESSING
U
NIT
E
RROR
C
OUNTER
(0
X
030C) ......................................................................................... 74
5.36
PDI
E
RROR
C
OUNTER
(0
X
030D) ........................................................................................................................... 74
5.37
SPI
PDI
E
RROR
C
ODE
(0
X
030E) .......................................................................................................................... 74
5.38
L
OST
L
INK
C
OUNTER
(0
X
0310:0
X
0313) ................................................................................................................ 75
5.39
W
ATCHDOG
D
IVIDER
(0
X
0400:0
X
0401) .............................................................................................................. 75
5.40
W
ATCHDOG
T
IME
PDI
(0
X
0410:0
X
0411) ........................................................................................................... 75
5.41
W
ATCHDOG
T
IME
P
ROCESS
D
ATA
(0
X
0420:0
X
0421) .......................................................................................... 75
5.42
W
ATCHDOG
S
TATUS
P
ROCESS
D
ATA
(0
X
0440:0
X
0441) ..................................................................................... 76
5.43
W
ATCHDOG
C
OUNTER
P
ROCESS
D
ATA
(0
X
0442) ................................................................................................. 76
5.44
W
ATCHDOG
C
OUNTER
PDI
(0
X
0443) ................................................................................................................... 76
5.45
SII
EEPROM
I
NTERFACE
(0
X
0500:0
X
050F) ....................................................................................................... 76
5.45.1
EEPROM emulation with TMC8460
..................................................................................................... 80
5.46
MII
M
ANAGEMENT
I
NTERFACE
(0
X
0510:0
X
0515) ................................................................................................ 80
5.47
P
ARAMETER
RAM
(0
X
0580:0
X
05AB)
FOR
TMC8460
MFCIO
B
LOCK
C
ONFIGURATION
................................... 85
5.48
FMMU
(0
X
0600:0
X
06FF)...................................................................................................................................... 86