Datasheet

TMC8460-BI Datasheet (V1.00 / 2016-Sep-01)
Copyright © 2016 TRINAMIC Motion Control GmbH & Co. KG 144
Bit 3
cfg_sof_enable
1 Retrigger by ETHERCAT start of frame
Bit 4
cfg_in_edge
0 Retrigger by input condition becoming
false
1 Retrigger by input condition becoming
true
R Bit 7
cfg_wd_active
1 Signals an active watchdog timeout
40
WD_OUT_
MASK_POL
W/R 64
Mask for outputs to be affected
by watchdog action
31:0 : WD_OUT_POL, polarity for outputs affected by
watchdog action
32 bit, each bit corresponds to one output line
The polarity describes the output level desired upon
watchdog action
63:32: WD_OUT_MASK, each bit corresponds to one
output line
0 Output is not affected
1 Output [i] becomes set to WD_OUT_POL[i] upon
watchdog action
See Table xxx below for the detailed signal mapping
/ indices of WD_OUT_MASK_POL
41
WD_OE_
POL
W/R 32
I/O Output enable level for outputs affected by
watchdog action
32 bit, each bit corresponds to one output line
The polarity describes the OE setting desired upon
watchdog action (1= output, 0= input)
42
WD_IN_
MASK_POL
W/R 32
Selection of input signals for watchdog retriggering
15:0 : WD_IN_POL, Input signal levels for watchdog
retriggering
16 bit, each bit corresponds to one input line
The polarity describes the input level for signals
selected by WD_IN_MASK required to re-trigger
the watchdog timer
31:16 : WD_IN_MASK, each bit corresponds to one
input line
0 Input is not selected
1 Input I/O[i] must reach polarity WD_IN_POL[i] to
re-trigger the watchdog timer
See Table xxx below for the detailed signal mapping
/ indices of WD_IN_MASK_POL
43 WD_MAX R 32
P
eak value reached by watchdog timeout counter
Reset to 0 by writing to WD_TIME