Datasheet

TMC8460-BI Datasheet (V1.00 / 2016-Sep-01)

6.9.5 PWM Value Registers

Together with the programmed PWM counter length, the PWM values determine the PWM duty cycle.

The PWM duty cycle is individually programmable for each of the three PWM units. Programming the

three PWM values sets up a vector of effective three voltages.

6.9.6 PULSE_A Configuration Register

The position of the trigger pulse A is programmable within the PWM cycle. A second trigger pulse

within the PWM cycle is programmable individually. This pulse is intended to trigger an ADC.

6.9.7 PULSE_B Configuration Register

The position of the trigger pulse B is programmable within the PWM cycle. A second trigger pulse

within the PWM cycle is programmable individually. This pulse is intended to trigger an ADC.

6.9.8 PULSE_LENGTH Configuration Register

To take the timing of different ADCs into account, the length of PULSE_A and PULSE_B and the fixed

trigger pulses named PULSE_CENTER and PULSE_ZERO, is commonly programmable in terms of clock

cycles by this register.

6.9.9 Asymmetric PWM Configuration Registers

To open a wider time window between PWM switching events that are close to each other PWM an

asymmetric PWM shift can be programmed individually for each PWM unit. This leaves the PWM duty

cycles unchanged. It is useful for current measurement with sense resistors at the bottom of the MOS-

FET half bridges. In contrast to current sensing with differential sense amplifiers or with hall sensor

bases current sensors within the current phase, this feature has no advantage.

6.9.10 Brake-Before-Make (BBM)

To avoid cross conduction, of the half bridges, the brake before make (BBM) timing is programmable.

In most cases, the same BBM time is sufficient for both, low side and high side. The BBM time should

be programmed as short as possible and as long as necessary. A too long BBM time causes conduction

of the bulk diodes of the power MOS-FETs and that causes higher power dissipation and less motor

performance concerning current regulation. In case of using PMOS-FETs for high and NMOS-FETs for low

side with asymmetric switching characteristics, it might be advantageous to program different BBM_H

time and BBM_L time.

6.9.11 BBM_H Configuration Register

This register programs the time from switch off the low side to switch on the high side in terms of

clock cycles. The BBM_H is common for all three high side power MOS-FETs.

6.9.12

BBM_L Configuration Registers

This register programs the time from switch off the high side to switch on the low side in terms of

clock cycles. The BBM_L is common for all three high side power MOS-FETs.

Figure 41 - Brake Before Make (BBM) Timing (individual programmable for Low Side and High Side)