Datasheet

TMC8460-BI Datasheet (V100 / 2016-Sep-01)

2.3.5 Configuration Inputs

External package pins allow for selection of configuration options that typically do not change during

operation by directly connecting them to 3V3 or ground. These package pins can also be controlled by

GPIOs of the local application controller.

These options are for example external EEPROM’s size, PHY addressing and MII TX clock shift

configuration, polarities of the PHYs’ link indicator, device emulation mode and enabling of the 16MHz

clock output.

2.3.6 EEPROM Interface

An EEPROM containing boot-up configuration data is required for ESC operation. The EEPROM must come

with a standard I2C interface and connects to the PROM interface of the TMC8460. EEPROMs of different

size can be used. There is a difference in the I2C protocol when EEPROM parts with >16kbits memory

size are used.

2.4 Software View

As seen from an EtherCAT master system, the TMC8460-BI is part of an EtherCAT slave using the register

set and functionality according to the EtherCAT standard. It works together with other EtherCAT slaves

on the same bus and is accessible via the Ethernet physical medium. According to the slave configuration

(ESI) and network configuration (ENI)

As seen from the local application controller, the TMC8460-BI is a peripheral SPI slave device with a

number of control and status registers that are accessible using the PDI SPI interface for the main

EtherCAT data path or the MFC CTRL SPI interface for the MFCIO block.

For proper EtherCAT functionality, the local application controller runs the EtherCAT slave stack to

process master requests regarding state changes in the state machine for example using the PDI SPI

interface. In device emulation mode the PDI SPI interface is not used since master requests are handled

inside the ESC.

The MFCIO block functions can directly be used with the MFC CTRL SPI interface. This can be done even

without using the EtherCAT slave controller part.

Trinamic’s TMCL IDE (http://www.trinamic.com/software-tools/tmcl-ide) can be used to access the device

with the TMC8460-BI evaluation board. All registers are accessible via the two SPI interfaces. The

configuration memory area for the MFCIO block can be read and modified.