Datasheet

TMC8460-BI Datasheet (V1.00 / 2016-Sep-01)
Copyright © 2016 TRINAMIC Motion Control GmbH & Co. KG 128
SPI_LENGTH <= 0x28
Start on TX write, SPI-Mode 3, MSB first, Keep CS low, Slave 0)
SPI_CONF <= 0x0068
Wait until SPI-Master is ready
while (SPI_STATUS & 0x01 != 0x01)
Write Data for the first 64 outputs into TX register
SPI_TX_DATA <= 0x5555AAAA55
Wait until SPI-Master is ready
while (SPI_STATUS & 0x01 != 0x01)
Start on TX write, SPI-Mode 3, MSB first, Drive CS high at the end, Slave 0)
SPI_CONF <= 0x0060
Write Data for the last 16 outputs into TX register
SPI_TX_DATA <= 0x55AAAA55AA
Wait until SPI-Master is ready
while (SPI_STATUS & 0x01 != 0x01)
Next transmission with inverted data
Start on TX write, SPI-Mode 3, MSB first, Keep CS low, Slave 0)
SPI_CONF <= 0x0068
Wait until SPI-Master is ready
while (SPI_STATUS & 0x01 != 0x01)
Write Data for the first 64 outputs into TX register
SPI_TX_DATA <= 0xAAAA5555AA
Wait until SPI-Master is ready
while (SPI_STATUS & 0x01 != 0x01)
Start on TX write, SPI-Mode 3, MSB first, Drive CS high at the end, Slave 0)
SPI_CONF <= 0x0060
Write Data for the last 16 outputs into TX register
SPI_TX_DATA <= 0xAA5555AA55
Wait until SPI-Master is ready
while (SPI_STATUS & 0x01 != 0x01)
C
HAIN OF
10
74
XX
595
SHIFT REGISTERS USED AS DIGITAL
80
OUTPUTS
(
BAD EXAMPLE
)
This bad example is the same as the previous one but with the non-recommended datagram split of 64
bits + 16 bit. This requires more communication since not only the SPI_CONF register needs to be
changed between the SPI_TX_DATA writes but also the SPI_LENGTH register changes every time.
Configuration and first transmission
Use 6.25 MHz SPI clock (25MHz/(4+(2*0))) = (25MHz/4)
SPI_TIME <= 0x00
Use a 64 bit datagram
SPI_LENGTH <= 0x3F
Start on TX write, SPI-Mode 3, MSB first, Keep CS low, Slave 0)
SPI_CONF <= 0x0068
Wait until SPI-Master is ready
while (SPI_STATUS & 0x01 != 0x01)
Write Data for the first 64 outputs into TX register
SPI_TX_DATA <= 0x5555AAAA5555AAAA
Wait until SPI-Master is ready
while (SPI_STATUS & 0x01 != 0x01)
Use a 16 bit datagram (remaining outputs)
SPI_LENGTH <= 0x0F
Start on TX write, SPI-Mode 3, MSB first, Drive CS high at the end, Slave 0)
SPI_CONF <= 0x0060
Write Data for the last 16 outputs into TX register
SPI_TX_DATA <= 0x55AA
Wait until SPI-Master is ready