Datasheet

TMC8460-BI Datasheet (V1.00 / 2016-Sep-01)

5.53.2 MFCIO Block ECAT Read Data Memory Block (0x4800:0x4823)

Data in this memory block is written by the MFCIO block and read by the ECAT master.

Table 131: MFCIO Block ECAT Read Data Memory Block (0x4800:0x4823)

Start

Address

Size

(bytes)

MFCIO Register Name

0x4800 1

ENC_STATUS

0x4804 4

ENC_X

0x4808 4 ENC_LATCH

0x480C 8 SPI_RX_DATA

0x4814 1 SPI_STATUS

0x4818 4 SD_SC

0x481C 1 GPI_IN_VAL

0x481E 2 IRQ_FLAGS

0x4820 4 WD_MAX

Table 132: Padding bytes

Start

Address

Number of

padding bytes

0x4801 3

0x4815 3

0x481D 1

Example:

When only the encoder position (ENC_X) is required via EtherCAT, a SyncManager starting at 0x4804 with

a length of 4 bytes can be set up.