Datasheet

TMC5130A DATASHEET (Rev. 1.11 / 2015-OCT-08) 112
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27 External Reset
The chip is loaded with default values during power on via its internal power-on reset. In order to
reset the chip to power on defaults, any of the supply voltages monitored by internal reset circuitry
(VSA, +5VOUT or VCC_IO) must be cycled. VCC is not monitored. Therefore VCC must not be switched
off during operation of the chip. As +5VOUT is the output of the internal voltage regulator, it cannot
be cycled via an external source except by cycling VSA. It is easiest and safest to cycle VCC_IO in order
to completely reset the chip. Also, current consumed from VCC_IO is low and therefore it has simple
driving requirements. Due to the input protection diodes not allowing the digital inputs to rise above
VCC_IO level, all inputs must be driven low during this reset operation. When this is not possible, an
input protection resistor may be used to limit current flowing into the related inputs.
In case, VCC becomes supplied by an external source, make sure that VCC is at a stable value above
the lower operation limit once the reset ends. This normally is satisfied when generating a 3.3V
VCC_IO from the +5V supply supplying the VCC pin, because it will then come up with a certain delay.
28 Clock Oscillator and Clock Input
The clock is the timing reference for all functions: the chopper, the velocity, the acceleration control,
etc. Many parameters are scaled with the clock frequency, thus a precise reference allows a more
deterministic result. The on-chip clock oscillator provides timing in case no external clock is easily
available.
USING THE INTERNAL CLOCK
Directly tie the CLK input to GND near to the IC if the internal clock oscillator is to be used. The
internal clock can be calibrated by driving the ramp generator at a certain velocity setting. Reading
out position values via the interface and comparing the resulting velocity to the remote masters’ clock
gives a time reference. A similar procedure also is described in 19.5. For a Step/Dir application, read
out TSTEP at a defined external step frequency. Scale acceleration and velocity settings, TOFF and
PWM_FREQ as a result. Temperature dependency and ageing of the internal clock is comparatively low.
In case well defined velocity settings and precise motor chopper operation are desired, it is supposed
to work with an external clock source.
USING AN EXTERNAL CLOCK
When an external clock is available, a frequency of 10 MHz to 16 MHz is recommended for optimum
performance. The duty cycle of the clock signal is uncritical, as long as minimum high or low input
time for the pin is satisfied (refer to electrical characteristics). Up to 18 MHz can be used, when the
clock duty cycle is 50%. Make sure, that the clock source supplies clean CMOS output logic levels and
steep slopes when using a high clock frequency. The external clock input is enabled with the first
positive polarity seen on the CLK input.
Attention
Switching off the external clock frequency prevents the driver from operating normally. Therefore be
careful to switch off the motor drivers before switching off the clock (e.g. using the enable input),
because otherwise the chopper would stop and the motor current level could rise uncontrolled. The
short to GND detection stays active even without clock, if enabled.
28.1 Considerations on the Frequency
A higher frequency allows faster step rates, faster SPI operation and higher chopper frequencies. On
the other hand, it may cause more electromagnetic emission of the system and causes more power
dissipation in the TMC5130A digital core and voltage regulator. Generally a frequency of 10 MHz to 16
MHz should be sufficient for most applications. For reduced requirements concerning the motor
dynamics, a clock frequency of down to 8 MHz (or even lower) can be considered.