Datasheet

TMC5130A DATASHEET (Rev. 1.11 / 2015-OCT-08) 11
www.trinamic.com
Pin
Number
Type
Function
REFR_DIR
9
DI
Right reference input when SPI_MODE=1 and SD_MODE=0
DIR input when SD_MODE=1 or SPI_MODE=0
VCC_IO
10
3.3V to 5V IO supply voltage for all digital pins.
SD_MODE
11
DI
(pu)
Mode selection input with pullup resistor. When tied low, the
internal ramp generator generates step pulses. When tied high,
the STEP/DIR inputs control the driver. Integrated pullup resistor.
SPI_MODE
12
DI
(pu)
Mode selection input with pullup resistor. When tied low, the
chip is in standalone mode and pins have their CFG functions.
When tied high, the SPI and UART interface are available for
control. Integrated pullup resistor.
GNDP
13, 48
Power GND. Connect to GND plane near pin.
DNC.
14, 16, 18,
20, 22, 41,
43, 45, 47
Do not connect these pins. Provided to increase creeping
distance on PCB in order to allow higher supply voltage without
coating.
OB1
15
Motor coil B output 1
BRB
17
Sense resistor connection for coil B. Place sense resistor to GND
near pin. An additional 100nF capacitor to GND (GND plane) is
recommended for best performance.
OB2
19
Motor coil B output 2
VS
21, 40
Motor supply voltage. Provide filtering capacity near pin with
short loop to nearest GNDP pin (respectively via GND plane).
ENCN_DCO
23
DIO
Encoder N-channel or dcStep ready output when SD_MODE=1.
With SD_MODE=0, pull to GND or VCC_IO, if the pin is not used.
ENCB_DCEN_
CFG4
24
DI
Encoder B-channel or dcStep enable input when SD_MODE=1 or
configuration input. With SD_MODE=1, tie to GND for normal
operation (no dcStep).
ENCA_DCIN_
CFG5
25
DI
Encoder A-channel or dcStep gating input for axis synchronization
when SD_MODE=1 or configuration input
SWN_DIAG0
26
DIO
Single wire I/O (negative) when SWSEL=1, otherwise diagnostics
output DIAG0. Interrupt or STEP output in motion controller
mode. Use external pullup resistor with 47k or less in open drain
mode.
SWP_DIAG1
27
DIO
Single wire I/O (positive) when SWSEL=1, otherwise diagnostics
output DIAG1. Position compare or DIR output in motion
controller mode. Use external pullup resistor with 47k or less in
open drain mode.
SWSEL
28
DI
(pd)
Single wire interface select input, tie high for use of single wire
interface (only when SPI_MODE=1). Integrated pull-down resistor.
DRV_ENN_
CFG6
29
DI
Enable input or configuration / Enable input. The power stage
becomes switched off (all motor outputs floating) when this pin
becomes driven to a high level.
AIN_IREF
30
AI
Analog reference voltage for current scaling (optional mode) or
reference current for use of internal sense resistors
GNDA
32
Analog GND. Tie to GND plane.
5VOUT
33
Output of internal 5V regulator. Attach 2.2µF or larger ceramic
capacitor to GNDA near to pin for best performance. May be used
to supply VCC of chip.
VCC
34
5V supply input for digital circuitry within chip and charge pump.
Attach 470nF capacitor to GND (GND plane). May be supplied by
5VOUT. A 2.2 or 3.3 Ohm resistor is recommended for decoupling
noise from 5VOUT. When using an external supply, make sure,
that VCC comes up before or in parallel to 5VOUT or VCC_IO,
whichever comes up later!
CPO
35
Charge pump capacitor output.