Datasheet

TMC5062 DATASHEET (Rev. 1.11 / 2017-MAY-16) 27
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GENERAL CONFIGURATION REGISTERS (0X00…0X1F)
R/W
Addr
n
Register
Description / bit names
incremented with each successful UART interface write access.
It can be read out to check the serial transmission for lost
data.
Read accesses do not change the content. Disabled in SPI
operation. The counter wraps around from 255 to 0.
W
0x03
4
+
4
SLAVECONF
Bit
SLAVECONF
3..0
TEST_SEL:
selects the function of REFR2 in test mode:
0…4: T120, DAC1, VDDH1, DAC2, VDDH2
Attention: Not for user, set to 0 for normal operation!
7..4
SENDDELAY:
0, 1: 8 bit times
2, 3: 3*8 bit times
4, 5: 5*8 bit times
6, 7: 7*8 bit times
8, 9: 9*8 bit times
10, 11: 11*8 bit times
12, 13: 13*8 bit times
14, 15: 15*8 bit times
R
0x04
8
+
8
INPUT
Bit
INPUT
Reads the state of all input pins available plus the
state of IO pins set to output.
0
io0_in: IO0 polarity
1
io1_in: IO1 polarity
2
io2_in: IO2 polarity
3
io3_in: IO3 polarity
4
iop_in: IOP pin polarity (always input in SPI mode)
5
ion_in: ION pin polarity (always input in SPI mode)
6
Reserved, ignore this bit
7
DRV_ENN
31..
24
VERSION: 0x01=first version of the IC
Identical numbers mean full digital compatibility.
W
4
+
4
OUTPUT
Bit
OUTPUT
Sets the IO output pin polarity and data direction.
0
io0_out: IO0 output polarity
1
io1_out: IO1 output polarity
2
io2_out: IO2 output polarity
3
Io3_out: IO3 output polarity
8
ioddr0: IO0 data direction: 0=input, 1=output
9
ioddr1: IO1 data direction: 0=input, 1=output
10
ioddr2: IO2 data direction: 0=input, 1=output
11
ioddr3: IO3 data direction: 0=input, 1=output
W
0x05
32
X_COMPARE
Position comparison register for motor 1 position strobe.
Activate poscmp_enable to get position pulse on output PP.
XACTUAL = X_COMPARE:
- Output PP becomes high. It returns to a low state, if
the positions mismatch.