Datasheet
TMC5062 DATASHEET (Rev. 1.11 / 2017-MAY-16) 24
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5.3 UART Signals
The UART interface on the TMC5062 has two signals:
TMC5062 UART INTERFACE SIGNALS
SWIOP
Non-inverted data input and output
SWION
Inverted data input and output for use in differential transmission. Can be left open
in a 5V IO voltage system. Tie to the half IO level voltage for best performance.
In UART mode the slave checks the serial wire SWIOP and SWION for correctly received datagrams
continuously. Both signals are switched as input during this time. It adapts to the baud rate based on
the sync nibble, as described before. In case of a read access, it switches on its output drivers on
SWIOP and SWION and sends its response using the same baud rate.
Master CPU
(µC with UART,
software
switches TXD to
hi-Z for
receiving)
TMC5062
SWIOP
SWION
TXD
R
IDLE
+V
IO
R
IDLE
forces stop bit level in idle conditions,
3k3 is sufficient
RXD
Figure 5.1 Connecting to a master via single wire UART interface
Master CPU
(µC with RS485
tranceiver)
TMC5062
SWIOP
SWION
A
B
R
TERM
50k
+V
IO
Figure 5.2 Connecting to a master via differential UART interface