Datasheet
TMC5062 DATASHEET (Rev. 1.11 / 2017-MAY-16) 10
www.trinamic.com
Pin
Number
Type
Function
VCC
33
5V supply input for digital circuitry within chip and charge pump.
Attach 470nF capacitor to GND (GND plane). May be supplied by
5VOUT. A 2.2Ω resistor is recommended for decoupling noise from
5VOUT. When using an external supply, make sure, that VCC comes
up before or in parallel to 5VOUT.
DIE_PAD
-
GND
Connect the exposed die pad to a GND plane. Provide as many as
possible vias for heat transfer to GND plane.
Table 2.1 Low voltage digital and analog power supply pins
Pin
Number
Type
Function
CPO
35
O(VCC)
Charge pump driver output. Outputs 5V (GND to VCC) square wave
with 1/16 of internal oscillator frequency.
CPI
36
I(VCP)
Charge pump capacitor input: Provide external 22 nF / 50 V capacitor
to CPO.
VCP
37
Output of charge pump. Provide external 100 nF capacitor to VS.
Table 2.2 Charge pump pins
Pin
Number
Type
Function
ENC1A/INT
1
I/O
Input A for incremental encoder 1. Can be programmed to provide
positive active interrupt output based on ramp generator flags
RAMP_STAT bits 4, 5, 6 & 7 and encoder null event status
ENC_STATUS bit 0 (poscmp_enable=1).
ENC1B/PP
2
I/O
Input B for incremental encoder 1. Can be programmed to provide
position compare output for motor 1 (poscmp_enable=1).
CSN/IO0
3
I/O
Chip select input of SPI interface, programmable IO in UART mode
SCK/IO1
4
I/O
Serial clock input of SPI interface, programmable IO in UART mode
SDI/IO2
5
I/O
Data input of SPI interface, programmable IO in UART mode
SDO/IO3
8
I/O
Data output of SPI interface (Tristate, enabled with CSN=0),
programmable IO in UART mode
SWIOP
(ENC1N)
9
I/O
Single wire UART interface I/O. Has internal 100K pulldown resistor.
Multi-purpose input in SPI mode or encoder 1 N input.
SWION
(ENC2N)
10
I/O
Single wire I/O (negative) for differential mode. Leave open in non-
differential mode when operating at 5V IO voltage or tie to desired
threshold voltage. Serial output in ring mode. Multi-purpose input in
SPI mode or encoder 2 N input.
CLK
11
I
Clock input. Tie to GND using short wire for internal clock or supply
external clock. The first high signal disables the internal oscillator
until power down.
SWSEL
12
I
Interface selection input. Tie to GND for SPI mode, tie to VCC_IO for
single wire (UART) interface mode.
REFR2
(ENC2B)
25
I
Right reference switch input for motor 2 or encoder 2 B input
REFL2
26
I
Left reference switch input for motor 2
REFR1
(ENC2A)
27
I
Right reference switch input for motor 1 or encoder 2 A input
REFL1
28
I
Left reference switch input for motor 1
DRV_ENN
29
I
Enable input for motor drivers. The power stage becomes switched
off (all motor outputs floating) when this pin becomes driven to a
high level. Tie to GND for normal operation.
TST_MODE
48
I
Test mode input. Tie to GND using short wire.
-
13, 23, 38
N.C.
Unused pins – no internal electrical connection. Leave open or tie to
GND for compatibility with future devices.
Table 2.3 Digital I/O pins (all related to VCC_IO supply)