Datasheet

TMC4671 Datasheet • IC Version V1.00 | Document Revision V1.03 • 2018-Sept-06

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20 ref_sw_r

21 ref_sw_h

22 ref_sw_l

23 ——-

24 pwm_min

25 pwm_max

26 adc_i_clipped

27 adc_aenc_clipped

28 ENC_N

29 ENC2_N

30 AENC_N

31 wd_error

Table 17: Status Flags Register

All controllers have input limiters as oﬀsets can be added to target values and they can be limited to stay

in certain ranges. Also all controller outputs can be limited and the integrating parts (error sums) of the

PI controllers are also limited to controller outputs. If d/dt-limiters are enabled they are also capable of

limiting target values.

If one of these limiters gets active, the ﬂag will go to high state. This is usually a normal operation, when

controllers are working on the boarders of there working area. With STATUS_MASK register corresponding

ﬂags can be activated.

Other status ﬂags go to high state whether the voltage limitation is reached (circular limiter in iPark

transformation) or PWM is saturated (pwm_min and pwm_max). This is also usual operation as the current

controller has to deal with voltage limitation at high velocity operation.

The user can also use the status output to generate an IRQ on reference switch or N-channel of encoder.

Also ADC clipping can be monitored which is a good indicator of wrong or faulty behaviour.

Remaining wd_error status ﬂag indicates an error on the clock input of the TMC4671 (see following section).

5.1 Watchdog

The TMC4671 uses an internal RC oscillator to monitor the clock input signal CLK. If during operation the

CLK signal is lost, the user can program the TMC4671 for diﬀerent responses via register WATCHDOG_CFG.

Power on default action is: no action, otherwise the ENABLE_OUT signal can be removed to disable the

power stage or the TMC4671 can be reset.

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