Datasheet

TMC4361A Datasheet | Document Revision 1.22 • 2017-JAN-12
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Read entire documentation; especially the “Supplemental Directives” on page 224.
 MAIN MANUAL 
Figure 58: TMC4361A connected with TMC23x/24x operating in SPI Mode or PWM Mode ........................ 133
Figure 59: dcStep extended Application Operation Area ......................................................................... 136
Figure 60: Velocity Profile with Impact through Overload Situation ......................................................... 138
Figure 61: Triangular Function that compensates Encoder Misalignments ............................................... 144
Figure 62: Outline of ABN Signals of an incremental Encoder ................................................................. 146
Figure 63:Serial Data Output: Four Examples ........................................................................................ 151
Figure 64: SSI: SSI_IN_CLK_DELAY=0 ................................................................................................. 153
Figure 65: SSI: SSI_IN_CLK_DELAY>SER_CLK_IN_HIGH ...................................................................... 153
Figure 66: Calculation of the Output Angle with appropriate CL_DELTA_P .............................................. 162
Figure 67: Closed-Loop Current Scaling ................................................................................................ 165
Figure 68: Closed-Loop Current Scaling Timing Behavior ....................................................................... 166
Figure 69: Calculation of the actual Load Angle GAMMA ........................................................................ 167
Figure 70: Manual Clock Gating Activation and Wake-Up ....................................................................... 170
Figure 71: Automatic Clock Gating Activation and Wake-Up ................................................................... 171
Figure 72: Example for SSI Output Configuration: M - Multiturn; S - Singleturn ....................................... 173
Figure 73: Internal Circuit Diagram for Layout Example ......................................................................... 219
Figure 74: Components Assembly for Application with Encoder .............................................................. 220
Figure 75: Top Layer: Assembly Side .................................................................................................... 220
Figure 76: Inner Layer (GND) .............................................................................................................. 221
Figure 77: Inner Layer (Supply VS) ...................................................................................................... 221
Figure 78: Package Dimensional Drawings ............................................................................................ 222
Figure 79: Marking Details on Chip
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