Datasheet

TMC4361A Datasheet | Document Revision 1.22 • 2017-JAN-12
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Read entire documentation; especially the “Supplemental Directives” on page 224.
 MAIN MANUAL 
Table 58: Index Channel Sensitivity ...................................................................................................... 146
Table 59: Supported SPI Encoder Data Transfer Modes ......................................................................... 156
Table 60: Dedicated Closed-Loop and PID Registers .............................................................................. 158
Table 61: Dedicated Reset and Clock Pins ............................................................................................. 169
Table 62: Dedicated Reset and Clock Gating Registers .......................................................................... 169
Table 63: Pin Names for Encoder Output Interface ................................................................................ 172
Table 64: Dedicated SPI Output Registers ............................................................................................ 172
Table 65: General Configuration 0x00 .................................................................................................. 177
Table 66: Reference Switch Configuration 0x01 .................................................................................... 180
Table 67: Start Switch Configuration START_CONF 0x02 ....................................................................... 182
Table 68: Input Filter Configuration Register INPUT_FILT_CONF 0x03 ................................................... 183
Table 69: SPI Output Configuration Register SPI_OUT_CONF 0x04 ........................................................ 186
Table 70: Current Scale Configuration (0x05)........................................................................................ 187
Table 71: Current Scale Values (0x06) .................................................................................................. 188
Table 72: Various Scaling Configuration Registers (0x15…0x1B) ............................................................ 189
Table 73: Encoder Signal Configuration ENC_IN_CONF (0x07) ............................................................... 193
Table 74: Serial Encoder Data Input Configuration ENC_IN_DATA (0x08) ............................................... 194
Table 75: Serial Encoder Data Output Configuration ENC_OUT_DATA (0x09) .......................................... 194
Table 76: Motor Driver Settings (0x0A) ................................................................................................. 195
Table 77: Event Selection Regsiters 0x0B…0x0D ................................................................................... 196
Table 78: Status Event Register EVENTS (0x0E) .................................................................................... 197
Table 79: Status Flag Register STATUS (0x0F) ...................................................................................... 198
Table 80: Various Configuration Registers: S/D, Synchronization, etc. .................................................... 199
Table 81: PWM Configuration Registers. ............................................................................................... 200
Table 82: Ramp Generator Registers .................................................................................................... 204
Table 83: External Clock Frequency Register ......................................................................................... 205
Table 84: Target and Compare Registers .............................................................................................. 205
Table 85: Pipeline Register .................................................................................................................. 206
Table 86: Shadow Register .................................................................................................................. 206
Table 87: Freeze Register .................................................................................................................... 207
Table 88: Reset and Clock Gating Register ............................................................................................ 207
Table 89: Encoder Registers ................................................................................................................ 209
Table 90: PID and Closed-Loop Registers ............................................................................................. 211
Table 91: Miscellaneous Registers ........................................................................................................ 212
Table 92: Transfer Registers ................................................................................................................ 213
Table 93: SinLUT Registers .................................................................................................................. 214
Table 94: SPI-DAC Configuration Registers. .......................................................................................... 215
Table 95: Version Register ................................................................................................................... 215
Table 96: Maximum Ratings: 3.3V supply ............................................................................................. 216
Table 97: Maximum Ratings: 5.0V supply ............................................................................................. 216
Table 98: Maximum Ratings: Temperature ........................................................................................... 216
Table 99: DC Characteristics ................................................................................................................ 217
Table 100: Power Dissipation ............................................................................................................... 217
Table 101: General IO Timing Parameters ............................................................................................ 218
Table 102: Package Dimensions ........................................................................................................... 222
Table 100: Document Revision History ................................................................................................. 230