Datasheet

TMC4361A Datasheet | Document Revision 1.22 • 2017-JAN-12
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Read entire documentation; especially the “Supplemental Directives” on page 224.
 MAIN MANUAL 
dcStep Registers
Micellaneous Registers
R/W
Addr
Bit
Val
Description
W
0x60
23:0
DC_VEL (Default:0x000000)
(dcStep only)
U
Minimum dcStep velocity [pps].
In case| VACTUAL | > DC_VEL dcStep is active, if enabled.
2
nd
assignment: Also used as CL_VMIN_EMF if closed-loop is enabled (section 19.26. )
3
rd
assignment: Also used as FS_VEL if no dcStep or closed-loop is enabled (see 19.16. )
0x61
7:0
DC_TIME (Default:0x00)
(TMC26x only and dcStep only)
U
Upper PWM on-time limit for commutation.
i Set slightly above effective blank time TBL of the driver.
15:8
DC_SG (Default:0x0000)
(TMC26x and dcStep only)
U
Maximum PWM on-time [# clock cycles ∙ 16] for step loss detection. If a loss is
detected (step length of first regular step after blank time of the dcStep input
signal is below DC_SG ), a stall event will be released.
31:16
DC_BLKTIME (Default:0x0000)
(TMC26x and dcStep only)
U
Blank time [# clock cycles] after fullstep release when no signal comparison should
happen.
23:0
2
nd
assignment: Also used as CL_VADD_EMF if closed-loop is enabled (see 19.26. )
0x62
31:0
DC_LSPTM (Default:0x00FFFFFF)
(dcStep only)
U
dcStep low speed timer [# clock cycles]
23:0
2
nd
assignment: Also used as ENC_VEL_ZERO if dcStep is disabled (see 19.26. )
Table 91: Miscellaneous Registers