Datasheet

TMC4361A Datasheet | Document Revision 1.22 • 2017-JAN-12
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Read entire documentation; especially the “Supplemental Directives” on page 224.
 MAIN MANUAL 
Input sample rate = f
CLK
1/2
SR
where:
SR
(extended with a particular name extension) is in [0… 7].
i This means that the next input value is considered after 2
SR
clock cycles.
i The filter length FILT_L can be set within the range [0… 7].
i The filter length FILT_L specifies the number of sampled bits that must have the
same voltage level to set a new input bit voltage level.
Input Sample
Rate (SR)
Sample Rate
Configuration
Sample Rate Configuration
SR Value
Sample Rate
0
f
CLK
1
f
CLK
/2
2
f
CLK
/4
3
f
CLK
/8
4
f
CLK
/16
5
f
CLK
/32
6
f
CLK
/64
7
f
CLK
/128
Table 8: Sample Rate Configuration
Digital Filter
Length ( FILT_L )
Configuration of Digital Filter Length
FILT_L value
Filter Length
0
No filtering.
1
2 equal bits.
2
3 equal bits.
3
4 equal bits.
4
5 equal bits.
5
6 equal bits.
6
7 equal bits.
7
8 equal bits.
Table 9: Configuration of Digital Filter Length
Digital Filter
Length
Configuration
Table