Datasheet

TMC4361A Datasheet | Document Revision 1.22 • 2017-JAN-12
182/230
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Read entire documentation; especially the “Supplemental Directives” on page 224.
 MAIN MANUAL 
START_CONF 0x02 (Default value: 0x00000000)
R/W
Bit
Val
Remarks
RW
18
cyclic_shadow_regs
0
Current ramp parameters are not written back to the shadow register.
1
Current ramp parameters are written back to the appropriate shadow register.
19
Reserved. Set to 0.
23:20
SHADOW_MISS_CNT
U
Number of unused start internal start signals between two consecutive shadow
register transfers.
31:24
XPIPE_REWRITE_REG
Current assigned pipeline registers – START_CONF (15:12) – are written back to
X_PIPEx in the case of an internal start signal generation and if assigned in this
register with a ‘1’:
XPIPE_REWRITE_REG (0)  X_PIPE0
XPIPE_REWRITE_REG (1)  X_PIPE1
XPIPE_REWRITE_REG (2)  X_PIPE2
XPIPE_REWRITE_REG (3)  X_PIPE3
XPIPE_REWRITE_REG (4)  X_PIPE4
XPIPE_REWRITE_REG (5)  X_PIPE5
XPIPE_REWRITE_REG (6)  X_PIPE6
XPIPE_REWRITE_REG (7)  X_PIPE7
Ex.:
START_CONF (15:12) = b’0011.
START_CONF (31:24) = b’01000010.
If an internal start signal is generated, the value of X_TARGET is written back to
X_PIPE1 , whereas the value of POS_COMP is written back to X_PIPE6 .
Table 67: Start Switch Configuration START_CONF 0x02