Datasheet
TMC4361A Datasheet | Document Revision 1.22 • 2017-JAN-12
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Read entire documentation; especially the “Supplemental Directives” on page 224.
MAIN MANUAL
GENERAL_CONF 0x00
(Default value: 0x00006020)
R/W
Bit
Val
Remarks
RW
22:21
dcstep_mode
0
dcStep is disabled.
1
dcStep signal generation will be selected automatically
2
dcStep with external STEP_READY signal generation (TMC2130).
3
dcStep with internal STEP_READY signal generation (TMC26x).
i TMC26x config: use const_toff-Chopper (CHM = 1);
slow decay only (HSTRRT = 0);
TST = 1 and SGT0=SGT1=1 (on_state_xy).
23
pwm_out_en
0
PWM output is disabled. Step/Dir output is enabled at STPOUT/DIROUT.
1
STPOUT/DIROUT output pins are used as PWM output (PWMA/PWMB).
24
serial_enc_out_enable
0
No encoder is connected to SPI output.
1
SPI output is used as SSI encoder interface to forward absolute SSI encoder data.
25
serial_enc_out_diff_disable
0
Differential serial encoder output is enabled.
1
Differential serial encoder output is disabled.
26
automatic_direct_sdin_switch_off
0
VACTUAL
=0 &
AACTUAL
=0 after switching off direct external step control.
1
VACTUAL
=
VSTART
and
AACTUAL
=
ASTART
after switching off direct external step
control.
27
circular_cnt_as_xlatch
0
The register value of
X_LATCH
is forwarded at register 0x36.
1
The register value of
REV_CNT
(#internal revolutions) is forwarded at register 0x36.
28
reverse_motor_dir
0
The direction of the internal SinLUT is regularly used.
1
The direction of internal SinLUT is reversed
29
intr_tr_pu_pd_en
0
INTR and TARGET_REACHED are outputs with strongly driven output values..
1
INTR and TARGET_REACHED are used as outputs with gated pull-up and/or
pull-down functionality.
30
intr_as_wired_and
0
INTR output function is used as Wired-Or in the case of
intr_tr_pu_pd_en
= 1.
1
INTR output function is used as Wired-And. in the case of
intr_tr_pu_pd_en
= 1.
31
tr_as_wired_and
0
TARGET_REACHED output function is used as Wired-Or in the case of
intr_tr_pu_pd_en
= 1.
1
TARGET_REACHED output function is used as Wired-And in the case of
intr_tr_pu_pd_en
= 1.
Table 65: General Configuration 0x00