Datasheet

TMC4361A Datasheet | Document Revision 1.22 • 2017-JAN-12
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Read entire documentation; especially the “Supplemental Directives” on page 224.
 MAIN MANUAL 
TECHNICA L SPECIFICAT IONS
19. Complete Register and Switches List
General Configuration Register GENERAL_CONF 0x00
GENERAL_CONF 0x00 (Default value: 0x00006020)
R/W
Bit
Val
Remarks
RW
0
use_astart_and_vstart
(only valid for S-shaped ramps)
0
Sets AACTUAL = AMAX or – AMAX at ramp start and in the case of VSTART ≠ 0.
1
Sets AACTUAL = ASTART or – ASTART at ramp start and in the case of VSTART ≠ 0.
1
direct_acc_val_en
0
Acceleration values are divided by CLK_FREQ.
1
Acceleration values are set directly as steps per clock cycle.
2
direct_bow_val_en
0
Bow values are calculated due to division by CLK_FREQ.
1
Bow values are set directly as steps per clock cycle.
3
step_inactive_pol
0
STPOUT = 1 indicates an active step.
1
STPOUT = 0 indicates an active step.
4
toggle_step
0
Only STPOUT transitions from inactive to active polarity indicate steps.
1
Every level change of STPOUT indicates a step.
5
pol_dir_out
0
DIROUT = 0 indicates negative direction.
1
DIROUT = 1 indicates negative direction.
7:6
sdin_mode
0
Internal step control (internal ramp generator will be used)
1
External step control via STPIN / DIRIN interface with high active steps at STPIN
2
External step control via STPIN / DIRIN interface with low active steps at STPIN
3
External step control via STPIN / DIRIN interface with toggling steps at STPIN
8
pol_dir_in
0
DIRIN = 0 indicates negative direction.
1
DIRIN = 1 indicates negative direction.
9
sd_indirect_control
0
STPIN/DIRIN input signals will manipulate internal steps at XACTUAL directly.
1
STPIN/DIRIN input signals will manipulate XTARGET register value, the internal
ramp generator is used.
Continued on next page.