Datasheet

TMC4361A Datasheet | Document Revision 1.22 • 2017-JAN-12
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© 2015 TRINAMIC Motion Control GmbH & Co. KG, Hamburg, Germany — Terms of delivery and rights
to technical change reserved. Download newest version at: www.trinamic.com .
Read entire documentation; especially the “Supplemental Directives” on page 224.
 MAIN MANUAL 
Per default, SPI encoder data transfer is managed in the same way as the
communication between microcontroller and TMC4361A. TMC4361A supports all four
SPI modes with proper setting of switches spi_low_before_cs and spi_data_on_cs .
THE PROCESS IS AS FOLLOWS:
By setting spi_low_before_cs = 0, negated chip select line at ANEG_NSCLK is
switched to active low before the serial clock line SCLK switches.
By setting spi_low_before_cs = 1, negated chip select line at ANEG_NSCLK is
switched to active low after the serial clock line SCLK switches.
By setting spi_data_on_cs = 0, the first data bit at BNEG_NSDI is changed at the
same time as the first slope of the serial clock SCLK.
By setting spi_data_on_cs = 1, the first data bit at BNEG_NSDI is changed at the
same time as the negated chip select signal at BNEG_NSDI switches to active level.
In the table below, all four SPI modes are presented.
Per default, the delay between serial clock line and negated chip select line has a time
frame of either SER_CLK_IN_HIGH or SER_CLK_IN_LOW clock cycles, which depends
on the actual voltage level of the serial clock.
This particular interval does not always match the encoder behavior perfectly.
Therefore, both the first and last intervals between the serial clock line and the
negated chip select line can be specified separately in clock cycles at
SSI_IN_CLK_DELAY register 0x57.
Below, the SSI_IN_CLK_DELAY interval is highlighted in red in all four diagrams.
Supported SPI Encoder Data Transfer Modes
spi_low_before_cs:
spi_data_on_cs
0
1
0
1
Table 59: Supported SPI Encoder Data Transfer Modes
Sample points
(B_SDI)
Serial data out
(BNEG_NSDI)
Serial clock out
(A_SCLK)
Chip Select
(ANEG_NSCLK)
MSB
LSB
Sample points
(B_SDI)
Serial data out
(BNEG_NSDI)
Serial clock out
(A_SCLK)
Chip Select
(ANEG_NSCLK)
MSB
LSB
Sample points
(B_SDI)
Serial data out
(BNEG_NSDI)
Serial clock out
(A_SCLK)
Chip Select
(ANEG_NSCLK)
MSB
LSB
Sample points
(B_SDI)
Serial data out
(BNEG_NSDI)
Serial clock out
(A_SCLK)
Chip Select
(ANEG_NSCLK)
MSB
LSB
SPI Encoder
Mode Selection