Datasheet

TMC4361A Datasheet | Document Revision 1.22 • 2017-JAN-12
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Read entire documentation; especially the “Supplemental Directives” on page 224.
 MAIN MANUAL 
SPI transmission to a DAC transfers an address or a command prior to the value that
must be defined. The length of the prefixed command/address can be assigned by
setting DAC_CMD_LENGTH according to specification of the SPI-DAC.
In order to set up the DAC communication scheme, do as follows:
Action:
 Set DAC_CMD_LENGTH (bit11:7 of SPI_OUT_CONF register 0x04) according to the
length of the address / command, which is placed in front of the values.
 Set DAC_ADDR register 0x1D according to your requirements:
Address/command of the 1
st
value: Set DAC_ADDR (15:0) = DAC_ADDR_A .
Address/command of the 2
nd
value: Set DAC_ADDR (31:16)= DAC_ADDR_B.
Result:
DAC_ADDR_A is placed in front of the first transferred value that can be the current
value of coilA (= CURRENTA_SPI ) or the scaling factor (= SCALE_PARAM ), whereas
DAC_ADDR_B is placed before the second current value CURRENTB_SPI .
i COVER_DATA_LENGTH comprises the whole datagram length, which is the sum
of the address/length DAC_CMD_LENGTH and the 8-bit data length.
i If the cover register length comprises more bits than the combination of
address/command and value, trailing zeros are added at the end.
i The command bits consist of the least significant bits of DAC_ADDR_x if the
command length is less than 16 bits long.
Several opportunities are available for the DAC data style:
 Current values are converted to absolute values. The phases of the values are
generated at the STPOUT (coilA) and DIROUT (coilB) pins. The base line (value
equals 0) is located at 0 (see Table 48, Figures B and C).
 The current values – which range between -255 and 255 – are mapped to values
between 0 and +255: the minimum value of -255 is an output value of 0, whereas
the baseline is set to +128. The maximum value remains at +255. In detail, the value
is divided by two and 128 is added to the quotient (Table 48, p. 119, Fig. A).
TMC4381 provides an offset to compensate for a shifted DAC baseline.
In order to shift the DAC baseline, do as follows:
Action:
 Set DAC_OFFSET (bit31:24 of register 0x7E) according to your requirements.
Result:
The digital values are shifted accordingly. Table 48 (Page 119), Figure D shows
absolute DAC values. The DAC baseline is shifted by 32 steps, whereas Table 48 (page
119), Figure E shows mapped DAC values, which are shifted by 64 steps.
i For the three available absolute values options – including the unsigned scale
parameter transfer – the offset represents an unsigned number.
i For the mapped values option the offset represents a signed number. To avoid a
carry over at the value limits +255 and -256 when using an DAC offset, the
MSLUT values must be scaled down for the SPI output values
(see Table 48 (page 119), figures D and E). This can be done by using the current
scale feature, as explained in chapter 11, page 120.
 Continued on next page.
DAC Address
Values
DAC Data Values