Datasheet

TMC429 DATASHEET (v. 1.07 / 2012-AUG-01) 44
Copyright © 2010-2012, TRINAMIC Motion Control GmbH & Co. KG
position
within
datagram
driver
NxM
bit
TMC429
signal
code
RAM
address
RAM
data
{POR}
TMC429
mnemonic of
primary signal
{POR default}
TMC23x /
TMC24x
Bit Name
0
driver#1 (SMDA=%00)
0
$10
$00
$10 {$11}
Zero {One}

MDA
1
0
$05
$01
$05
DAC_A_5

CA3
2
0
$04
$02
$04
DAC_A_4

CA2
3
0
$03
$03
$03
DAC_A_3

CA1
4
0
$02
$04
$02
DAC_A_2

CA0
5
0
$06
$05
$06
PH_A

PHA
6
0
$10
$06
$10 {$11}
Zero {One}

MDB
7
0
$0D
$07
$0D
DAC_B_5

CB3
8
0
$0C
$08
$0C
DAC_B_4

CB2
9
0
$0B
$09
$0B
DAC_B_3

CB1
10
0
$0A
$0A
$0A
DAC_B_2

CB0
11
1
$0E
$0B
$2E
PH_B

PHB
12
driver#2 (SMDA=%01)
0
$10
$0C
$10 {$11}
Zero {One}

MDA
13
0
$05
$0D
$05
DAC_A_5

CA3
14
0
$04
$0E
$04
DAC_A_4

CA2
15
0
$03
$0F
$03
DAC_A_3

CA1
16
0
$02
$10
$02
DAC_A_2

CA0
17
0
$06
$11
$06
PH_A

PHA
18
0
$10
$12
$10 {$11}
Zero {One}

MDB
19
0
$0D
$13
$0D
DAC_B_5

CB3
20
0
$0C
$14
$0C
DAC_B_4

CB2
21
0
$0B
$15
$0B
DAC_B_3

CB1
22
0
$0A
$16
$0A
DAC_B_2

CB0
23
1
$0E
$17
$2E
PH_B

PHB
24
driver#3 (SMDA=%10)
0
$07
$18
$07 {$11}
FD_A {One}

MDA
25
0
$05
$19
$05
DAC_A_5

CA3
26
0
$04
$1°
$04
DAC_A_4

CA2
27
0
$03
$1B
$03
DAC_A_3

CA1
28
0
$02
$1C
$02
DAC_A_2

CA0
29
0
$06
$1D
$06
PH_A

PHA
30
0
$0F
$1E
$0F {$11}
FD_B {One}

MDB
31
0
$0D
$1F
$0D
DAC_B_5

CB3
32
0
$0C
$20
$0C
DAC_B_4

CB2
33
0
$0B
$21
$0B
DAC_B_3

CB1
34
0
$0A
$22
$0A
DAC_B_2

CB0
35
1
$0E
$23
$2E
PH_B

PHB
With LSMD = %10 the (third) NxM bit at address $23 (position 35) finishes the datagram transmission
Table 12-2: Datagram example and RAM contents for three stepper motor driver chain
Hint: Power-On default initialization values of the TMC429 are marked as {One} within theTable 12-2.