Datasheet
TMC429 DATASHEET (v. 1.07 / 2012-AUG-01) 36
Copyright © 2010-2012, TRINAMIC Motion Control GmbH & Co. KG
polarity_DAC_AB defines the polarity of the DAC bit
vectors. low active.
The bit named csCommonIndividual defines either if a single chip select signal nSCS_S is used in
common for all stepper motor driver chips (TMC236, TMC239, TMC246, TMC249) or three chip select
signals nSCS_S, nSCS2, nSCS3 are used to select the stepper motor driver chips individually. This
feature is useful only for the TMC429 within the larger packages, where the two additional chip select
signals nSCS2, nSCS3 are available (see Figure 3-4). The one common chip select signal nSCS_S is
used if the bit named csCommonIndividual=‘0’. The polarity control bit for the nSCS_S signal must
be set to polarity_nscs_s=’0’ if csCommonIndividual=’1’. The chip select polarity is always negative
for three individual chips select signals.
The eight bits named clk2_div determine the clock frequency of the stepper motor driver chain clock
signal SCK_S. The frequency f_sck_s[Hz] of the stepper motor driver chain clock signal SCK_S is
f_sck_s[Hz] = f_clk[Hz] / ( 2 * (clk2_div+1) ). A value of 255 (%11111111, $FF) is the upper limit for
the parameter clk2_div. With clk2_div = 255 the clock frequency of SCK_S is at minimum. Due to
internal processing, a value of 7 (%00000111, $07) is the lower limit for the clock divider parameter
clk2_div. With clk2_div = 7 the clock frequency of SCK_S is at maximum. A value of clk2_div = 7 is
sufficient for the drivers TMC236 / TMC239 / TMC246 / TMC249.
Note: For most applications, a setting of clk2_div = 7 is recommended.
For smooth motion even at high step frequencies the frequency f_sck_s[Hz] of the clock signal
SCK_S should be as high as possible that is compatible with the used drivers. The frequency
f_sck_s[Hz] of SCK_S does not become higher for clk2_div < 7, but the signal SCK_S becomes
asymmetric with respect to its duty cycle. An asymmetric duty cycle may cause malfunction of stepper
motor drivers, where stepper motor driver chips may work correctly in particular at low clock
frequencies of CLK. So, the range of clk2_div is {7, 8, 9, . . ., 253, 254, 255}.
The default value after power-on reset is clk2_div = 15. The clock frequency f_sck_s[Hz] of SCK_S
should be set as high as possible by choosing the parameter clk2_div in consideration of the data
clock frequency limit defined by the slowest stepper motor driver chip of the daisy chain. If step
frequencies reach the order of magnitude of the maximum datagram frequency determined by the
clock frequency of SCK_S and by the datagram length the step frequencies may jitter, which is an
inherent property of that serial communication. Up to which level variations of step frequencies are
acceptable depends on the application. Using microstepping driver chips as provided by TMC236 /
TMC239 / TMC246 / TMC249 driver chips avoids this problem.
The datagram frequency is f_datagram[Hz] = f_sck_s[Hz] / ( 1 + datagram_length[bit] + 1). This
formula is an approximation for the upper limit. For clk2_div = 7 the processing of the NxM bit requires
1 SPI clock cycle, where the processing of the NxM bit requires 1.5 SPI clock cycles for clk2_div > 7.
So, for a chain of three drivers with 12 bit datagram length each, the upper limit of the datagram
frequency is f_datagram[Hz] = f_sck_s[Hz] / ( 1 + 3*(12+1) + 1) = f_sck_s[Hz] / 41.
The TMC429 sends datagrams to the stepper motor driver chain on demand only. No datagrams are
send if continuous_update
multiplexed reference switch inputs are processed while datagrams are sent to the stepper motor
driver chain only. If reference switches are configured to stop associated stepper motors automatically,
the configuration bit continuous_update
the stepper motor driver chain and to sample the reference switches periodically, if all stepper motors
are at rest. With this, a stepper motor restarts if its associated reference switch becomes inactive.
Without continuous update, a stepper motor stopped by a reference switch would stay at rest until a
datagram is sent to the stepper motor driver chain, if its reference switch is inactive. Then, the relevant
stepper motor can be moved into the direction opposite to the reference switch or it can be moved in
both directions by disabling the automatic stop function. The continuous update datagram frequency is
f_cupd_s[Hz] = f_clk[Hz] * ( 1 / 2^ramp_div_0 + 1 / 2^ramp_div_1 + 1 / 2^ramp_div_2 ) / 32768
where ramp_div_0, ramp_div_1, ramp_div_2 are the ramp_div settings of the three stepper motors.