Datasheet

TMC429 DATASHEET (v. 1.07 / 2012-AUG-01) 18
Copyright © 2010-2012, TRINAMIC Motion Control GmbH & Co. KG
Important Hint: -
divider clk2_div (see section 10.11, page 35) that is initialized with 15.
32 bit DATAGRAM sent from a µC to the TMC428 / TMC429 via pin SDI_C
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9
8
7
6
5
4
3
2
1
0
RRS
ADDRESS
RW
DATA
0
smda
IDX
RW=0 : WRITE access / RW=1 : READ access
three stepper motor register sets (SMDA={00, 01, 10})
0
0
1
0
1
0
0
0
0
0
x_target
0
0
0
1
x_actual
0
0
1
0
v_min
0
0
1
1
v_max
0
1
0
0
v_target
0
1
0
1
v_actual
0
1
1
0
a_max
0
1
1
1
a_actual
1
0
0
0
is_agtat
is_aleat
is_v0
a_threshold
1
0
0
1
1
pmul
pdiv
1
0
1
0
lp
ref_conf
rm
1
0
1
1
interrupt_mask
interrupt_flags
1
1
0
0
pulse_div
ramp_div
usrs
1
1
0
1
dx_ref_tolerance
1
1
1
0
x_latched
1
1
1
1
ustep_count_429
1
1
JDX
common registers (SMDA=11)
0
0
0
0
datagram_low_word
0
0
0
1
datagram_high_word
0
0
1
0
cw
cover_position
cover_len
0
0
1
1
cover_datagram
0
1
0
0
if_configuration_429
0
1
0
1
pos_comp_429
0
1
1
0
pos_comp_int_429 :
M
I
1
0
0
0
power-down
1
0
0
1
type_version_429 (= $429101 for TMC429 version 1.01, read only)
1
1
1
0
l3
r3
l2
r2
l1
r1
1
1
1
1
1
1
mot1r
refmux
cont_update
clk2_div
cs_ComInd
polarities
LSMD
DAC_AB
FD_AB
PH_AB
SCK_S
nSCS_S
0
0
0
0
stpdiv_429
(if EN_SD='1')
RRS
ADDRESS
RW
DATA
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9
8
7
6
5
4
3
2
1
0
Table 8-2: TMC428 / TMC429 register mapping (additional TMC429 registers marked with _429)