Datasheet

TMC429 DATASHEET (v. 1.07 / 2012-AUG-01) 16

microcontroller in regard to the datagram covering mechanism. This feature is necessary to enable

direct data transmission from a microcontroller to the stepper motor driver chips for initialization

purposes. The CDGW status bit also gives the status of the datagram_high_word and

datagram_low_word (see section 10.1).

The status bits RS3, RS2, RS1 represent the settings of the reference switches. But, the reference

switch inputs REF3, REF2, REF1 are not mapped directly to these status bits. Rather, the reference

switch inputs may have different functions, depending on programming (see pages 25  27). The three

status bits xEQt3, xEQt2, xEQt1 indicate individually for each stepper motor, if it has reached its target

position. The status bits RS3, RS2, RS1 and bits xEQt3, xEQt2, xEQt1 can trigger an interrupt or

enable simple polling techniques.

7.5 Simple Datagram Examples

The % prefix normally indicating binary representation in this data sheet is omitted for the following

datagram examples. Assuming, one would like to write (RW=0) to a register (RRS=0) at the address

%001101 the following data word %0000 0000 0000 0001 0010 0011, one would have to send the

following 32 bit datagram

00011010000000000000000100100011

to the TMC429. With inactive interrupt (INT=0), no cover datagram waiting (CDGW=0), all reference

switches inactive (RS3=0, RS2=0, RS1=0), and all stepper motors at target position (xEQt3=1,

xEQt2=1, xEQt1=1) the status bits would be %10010101 the TMC429 would send back the 32 bit

datagram:

10010101000000000000000000000000

To read (RW=1) back the register written before, one would have to send the 32 bit datagram

00011011000000000000000000000000

to the TMC429 and would get back from it the datagram

10010101000000000000000100100011.

Write (RW=0) access to on-chip RAM (RRS=1) to an address %111111 occurs similar to register

access, but with RRS=1. To write two 6 bit data words %100001 and %100011 to successive pair-wise

RAM addresses %1111110 and %1111111 (%100001 to %1111110 and %100011 to %1111111)

which are commonly addressed by one datagram (see pages 17 and 40), one would have to send the

datagram

11111110000000000010001100100001.

To read (rw=1) from that on-chip memory address, one would have to send the datagram

11111111000000000000000000000000.