Datasheet

TMC2660 DATASHEET (Rev. 1.05 / 2016-JUL-14) 16
www.trinamic.com
SPI Interface Timing
AC-Characteristics
clock period is t
CLK
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
SCK valid before or after change
of CSN
t
CC
10
ns
CSN high time
t
CSH
*)
Min time is for
synchronous CLK
with SCK high one
t
CH
before CSN high
only
t
CLK
>2t
CLK
+10
ns
SCK low time
t
CL
*)
Min time is for
synchronous CLK
only
t
CLK
>t
CLK
+10
ns
SCK high time
t
CH
*)
Min time is for
synchronous CLK
only
t
CLK
>t
CLK
+10
ns
SCK frequency using internal
clock
f
SCK
Assumes minimum
OSC frequency
4
MHz
SCK frequency using external
16MHz clock
f
SCK
Assumes
synchronous CLK
8
MHz
SDI setup time before rising
edge of SCK
t
DU
10
ns
SDI hold time after rising edge
of SCK
t
DH
10
ns
Data out valid time after falling
SCK clock edge
t
DO
No capacitive load
on SDO
t
FILT
+5
ns
SDI, SCK, and CSN filter delay
time
t
FILT
Rising and falling
edge
12
20
30
ns
6.3 Bus Architecture
SPI slaves can be chained and used with a single chip select line. If slaves are chained, they behave
like a long shift register. For example, a chain of two motor drivers requires 40 bits to be sent. The
last bits shifted to each register in the chain are loaded into an internal register on the rising edge of
the CSN input. For example, 24 or 32 bits can be sent to a single motor driver, but it latches just the
last 20 bits received before CSN goes high.
Driver 3
Half Bridge 2
Half Bridge 1
Half Bridge 1
Half Bridge 2
+V
M
VSA / B
2 x current
comparator
2 phase
stepper
motor
N
S
TMC2660 stepper driver
RSA / B
Protection
& diagnostics
sine table
4*256 entry
STEP
DIR
2 x DAC
SPI control,
Config & diags
CSN
SCK
SDO
SDI
stallGuard2™
coolStep™
x
step multiplier
SG_TST
OA1
OA2
BRA / B
R
SENSE
R
SENSE
OB1
OB2
chopper
VCC_IO
TMC429
triple stepper motor
controller
SPI to master
nSCS_C
SCK_C
SDOZ_C
SDI_C
CLK
3x linear RAMP
generator
Position
comparator
Interrupt
controller
nINT
Reference switch
processing
Step &
Direction pulse
generation
Output select
SPI or
Step & Dir
Microstep table
Serial driver
interface
POSCOMP
3 x REF_L, REF_R
S1 (SDO_S)
D1 (SCK_S)
S2 (nSCS_S)
D2 (SDI_S)
S3 (nSCS_2)
D3 (nSCS_3)
Driver 2
Real time Step &
Dir interface
User CPU
Motion command
SPI
TM
Configuration and
diagnostics SPI
TM
Mechanical Feedback or
virtual stop switch
Realtime event trigger Virtual stop switch
Stepper
#1
Third driver and motor
Second driver and motor
System interfacing
System control
Motion control
coolStep motor
driver
Figure 6.2 Interfaces to a TMC429 motion controller chip and a TMC2660 motor driver