Datasheet
TMC262 / TMC262C DATASHEET (Rev. 2.22 / 2019-FEB-22) 26
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6.9 Driver Control Register (DRVCONF)
DRVCONF
Driver Configuration
Bit
Name
Function
Comment
19
1
Register address bit
18
1
Register address bit
17
1
Register address bit
16
TST
Reserved TEST mode
Must be cleared for normal operation. When set, the
SG_TST output exposes digital test values, and the
TEST_ANA output exposes analog test values. Test value
selection is controlled by SGT1 and SGT0:
TEST_ANA: %00: anatest_2vth,
%01: anatest_dac_out,
%10: anatest_vdd_half.
SG_TST: %00: comp_A,
%01: comp_B,
%10: CLK,
%11: on_state_xy
15
SLPH1
Slope control, high
side
%00: Minimum
%01: Minimum (+tc)
%10: Medium (+tc)
%11: Maximum
In temperature compensated mode (tc), the high-side
MOSFET gate driver strength is increased if the
overtemperature warning temperature is reached. This
compensates for temperature dependency of high-side
slope control.
14
SLPH0
13
SLPL1
Slope control, low
side
12
SLPL0
11
0
Reserved
10
DISS2G
Short to GND
protection disable
0: Short to GND protection is enabled.
1: Short to GND protection is disabled.
9
TS2G1
Short to GND
detection timer
%00: 3.2µs.
%01: 1.6µs.
%10: 1.2µs.
%11: 0.8µs.
8
TS2G0
7
SDOFF
STEP/DIR interface
disable
0: Enable STEP/DIR operation.
1: Disable STEP/DIR operation. SPI interface is used to
move motor.
6
VSENSE
Sense resistor
voltage-based current
scaling
0: Full-scale sense resistor voltage is 305mV.
1: Full-scale sense resistor voltage is 165mV.
(Full-scale refers to a current setting of 31 and a DAC
value of 255.)
5
RDSEL1
Select value for read
out (RD bits)
%00
Microstep position read back
4
RDSEL0
%01
StallGuard2 level read back
%10
StallGuard2 & CoolStep current level read back
%11
Reserved, do not use
3
OTSENS
*)
Overtemperature
sensitivity
0: Shutdown at 150°C
1: Sensitive shutdown at 136°C
2
SHRTSENS
*)
Short to GND
detection sensitivity
0: Low sensitivity
1: High sensitivity – better protection for high side FETs
1
0
Reserved
0
EN_S2VS
*)
Enable short to VS &
CLK fail protection
0: Short to VS and clock failsafe protection disabled
1: Short to VS / overcurrent protection enabled. In
addition, enables protection against clock input CLK fail,
when using an external clock source.
*) These three bits have a function for TMC262C only. Setting these bits for TMC262 does not have any
effect. The TMC262 and TMC262C behave identically with setting 0.