Datasheet

TMC262 / TMC262C DATASHEET (Rev. 2.22 / 2019-FEB-22) 19
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6.4 Register Write Commands
An SPI bus transaction to the TMC262 is a write command to one of the five write-only registers that
hold configuration parameters and mode bits:
Register
Description
Driver Control Register
(DRVCTRL)
The DRVCTRL register has different formats for controlling the
interface to the motion controller depending on whether or
not the STEP/DIR interface is enabled.
Chopper Configuration Register
(CHOPCONF)
The CHOPCONF register holds chopper parameters and mode
bits.
CoolStep Configuration Register
(SMARTEN)
The SMARTEN register holds CoolStep parameters and a mode
bit. (smartEnergy is an earlier name for CoolStep.)
StallGuard2 Configuration Register
(SGCSCONF)
The SGCSCONF register holds StallGuard2 parameters and a
mode bit.
Driver Configuration Register
(DRVCONF)
The DRVCONF register holds parameters and mode bits used to
control the power MOSFETs and the protection circuitry. It also
holds the SDOFF bit which controls the STEP/DIR interface and
the RDSEL parameter which controls the contents of the
response returned in an SPI transaction
In the following sections, multibit binary values are prefixed with a % sign, for example %0111.