Datasheet

TMC246 DATA SHEET (V2.02 / Jul. 31st, 2006) 24
Copyright © 2005, TRINAMIC Motion Control GmbH & Co KG
SPI Interface Timing
Propagation Times
(3.0 V ≤ VCC ≤ 5.5 V, -40°C ≤ Tj ≤ 150°C; V
IH
= 2.8V, V
IL
= 0.5V; tr, tf = 10ns; C
L
= 50pF,
unless otherwise specified)
Symbol Parameter Conditions Min Typ Max Unit
f
SCK
SCK frequency ENN = 0 DC 4 MHz
t
1
SCK stable before and after
CSN change
50 ns
t
CH
Width of SCK high pulse 100 ns
t
CL
Width of SCK low pulse 100 ns
t
DU
SDI setup time 40 ns
t
DH
SDI hold time 50 ns
t
D
SDO delay time C
L
= 50pF 40 100 ns
t
ZC
CSN high to SDO high
impedance
50 ns
t
ES
ENN to SCK setup time 30 ns
t
PD
CSN high to output change
delay
3 µs
SDO is tristated whenever ENN is inactive (high) or CSN is inactive (high).
Using the SPI interface
The SPI interface allows either cascading of multiple devices, giving a longer shift register, or working
with a separate chip select signal for each device, paralleling all other lines. Even when there is only
one device attached to a CPU, the CPU can communicate with it using a 16 bit transmission. In this
case, the upper 4 bits are dummy bits.
SPI Filter
To prevent spikes from changing the SPI settings, SPI data words are only accepted, if their length is
at least 12 bit.
t
1
SDO
SDI
SCK
CSN
t
ES
t
1
t
1
t
CL
t
CH
bit11 bit10 bit0
bit11 bit10 bit0
t
D
t
ZC
t
DU
t
DH
ENN