Datasheet
TMC2209 DATASHEET (Rev. 1.03 / 2019-JUN-26) 23
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5.1.1 OTP_READ – OTP configuration memory
The OTP memory holds power up defaults for certain registers. All OTP memory bits are cleared to 0
by default. Programming only can set bits, clearing bits is not possible. Factory tuning of the clock
frequency affects otp0.0 to otp0.4. The state of these bits therefore may differ between individual ICs.
0X05: OTP_READ – OTP MEMORY MAP
Bit
Name
Function
Comment
23
otp2.7
otp_en_SpreadCycle
This flag determines if the driver defaults to SpreadCycle
or to StealthChop.
0
Default: StealthChop (GCONF.en_SpreadCycle=0)
OTP 1.0 to 1.7 and 2.0 used for StealthChop
SpreadCycle settings: HEND=0; HSTART=5; TOFF=3
1
Default: SpreadCycle (GCONF.en_SpreadCycle=1)
OTP 1.0 to 1.7 and 2.0 used for SpreadCycle
StealthChop settings: PWM_GRAD=0; TPWM_THRS=0;
PWM_OFS=36; pwm_autograd=1
22
otp2.6
OTP_IHOLD
Reset default for standstill current IHOLD (used only if
current reduction enabled, e.g. pin PDN_UART low).
%00: IHOLD= 16 (53% of IRUN)
%01: IHOLD= 2 ( 9% of IRUN)
%10: IHOLD= 8 (28% of IRUN)
%11: IHOLD= 24 (78% of IRUN)
(Reset default for run current IRUN=31)
21
otp2.5
20
otp2.4
OTP_IHOLDDELAY
Reset default for IHOLDDELAY
%00: IHOLDDELAY= 1
%01: IHOLDDELAY= 2
%10: IHOLDDELAY= 4
%11: IHOLDDELAY= 8
19
otp2.3
18
otp2.2
otp_PWM_FREQ
Reset default for PWM_FREQ:
0: PWM_FREQ=%01=2/683
1: PWM_FREQ=%10=2/512
17
otp2.1
otp_PWM_REG
Reset default for PWM_REG:
0: PWM_REG=%1000: max. 4 increments / cycle
1: PWM_REG=%0010: max. 1 increment / cycle
16
otp2.0
otp_PWM_OFS
Depending on otp_en_SpreadCycle
0
0: PWM_OFS=36
1: PWM_OFS=00 (no feed forward scaling);
pwm_autograd=0
OTP_CHOPCONF8
1
Reset default for CHOPCONF.8 (hend1)
15
otp1.7
OTP_TPWMTHRS
Depending on otp_en_SpreadCycle
14
otp1.6
0
Reset default for TPWM_THRS as defined by (0..7):
0: TPWM_THRS= 0
1: TPWM_THRS= 200
2: TPWM_THRS= 300
3: TPWM_THRS= 400
4: TPWM_THRS= 500
5: TPWM_THRS= 800
6: TPWM_THRS= 1200
7: TPWM_THRS= 4000
13
otp1.5
OTP_CHOPCONF7...5
1
Reset default for CHOPCONF.5 to CHOPCONF.7
(hstrt1, hstrt2 and hend0)
12
otp1.4
otp_pwm_autograd
Depending on otp_en_SpreadCycle
0
0: pwm_autograd=1
1: pwm_autograd=0