Datasheet

TMC2130 DATASHEET (Rev. 1.09 / 2017-MAY-15) 31
www.trinamic.com
DRIVER REGISTER SET (0X6C…0X7F)
R/W
Addr
n
Register
Description / bit names
Range [Unit]
RW
0x6C
32
CHOPCONF
chopper and driver configuration
See separate table!
W
0x6D
25
COOLCONF
coolStep smart current control register
and stallGuard2 configuration
See separate table!
W
0x6E
24
DCCTRL
dcStep (DC) automatic commutation
configuration register (enable via pin DCEN
or via VDCMIN):
bit 9… 0: DC_TIME: Upper PWM on time
limit for commutation (DC_TIME *
1/f
CLK
). Set slightly above effective
blank time TBL.
bit 23… 16: DC_SG: Max. PWM on time for
step loss detection using dcStep
stallGuard2 in dcStep mode.
(DC_SG * 16/f
CLK
)
Set slightly higher than
DC_TIME/16
0=disable
Attention: Using a higher microstep
resolution or interpolated operation, dcStep
delivers a better stallGuard signal.
DC_SG is also available above VHIGH if
vhighfs is activated. For best result also set
vhighchm.
R
0x6F
32
DRV_
STATUS
stallGuard2 value and driver error flags
See separate table!
W
0x70
22
PWMCONF
Voltage PWM mode chopper configuration
See separate table!
reset default=
0x00050480
R
0x71
8
PWM_SCALE
Actual PWM amplitude scaler
(255=max. Voltage)
In voltage mode PWM, this value allows to
detect a motor stall.
0…255
W
0x72
2
ENCM_CTRL
Encoder mode configuration for a special
mode (enc_commutation), not for normal
use.
Bit 0: inv: Invert encoder inputs
Bit 1: maxspeed: Ignore Step input. If
set, the hold current IHOLD
determines the motor current,
unless a step source is activated.
The direction in this mode is determined by
the shaft bit in GCONF or by the inv bit.
R
0x73
20
LOST_STEPS
Number of input steps skipped due to higher
load in dcStep operation, if step input does
not stop when DC_OUT is low. This counter
wraps around after 2^20 steps. Counts up or
down depending on direction. Only with
SDMODE=1.