Datasheet

TMC4671 Datasheet IC Version V1.3 | Document Revision V2.00 2020-Apr-17
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4.9 PWM Engine
The PWM engine takes care of converting voltage vectors to pulse width modulated (PWM) control signals.
These digital PWM signals control the gate drivers of the power stage. For a detailed description of the
PWM control registers and PWM register control bits pls. refer section 7 page 68.
The ease-of-use PWM engine requires just a couple of parameter settings. Primarily, the polarities for the
gate control signal of high-side and low-side must be set. The power on default PWM mode is 0, meaning
PWM = OFF. For operation, the centered PWM mode must be switched on by setting the PWM mode to 7.
A single bit switches the space vector PWM (SVPWM) on. For 3-phase PMSM, the SVPWM = ON gives more
eective voltage. Nevertheless, for some applications it makes sense to switch the SVPWM = OFF to keep
the star point voltage of a motor almost at rest.
4.9.1 PWM Polarities
The PWM polarities register (PWM_POLARITIES) controls the polarities of the logic level gate control signals.
The polarities of the gate control signals are individually programmable for low-side gate control and for
high-side gate control. The PWM polarities register controls the polarity of other control signals as well.
PWM_POLARITIES[1] controls the polarity of the logic level high side gate control signal. PWM_POLARITIES[0]
controls the polarity of the logic level low side gate control signal.
Figure 37: PWM Gate Driver Control Polarities
PWM_POLARITIES[1. . . 0] PWM_HIGH_SIDE PWM_LOW_SIDE
0 0 PWM_H PWM_L
0 1 PWM_H not PWM_L
1 0 not PWM_H PWM_L
1 1 not PWM_H not PWM_L
Table 21: Status Flags Register
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