Datasheet

TMC4671 Datasheet • IC Version V1.3 | Document Revision V2.00 • 2020-Apr-17

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4.2.4 Step/Direction Interface

The user can manipulate the target position via the step direction interface. It can be enabled by setting

the STEP_WIDTH (s32) register to a proper step width. The power-on default value of STEP_WIDTH is 0 that

causes position target update with 0 step width that is no stepping. With STEP_WIDTH

= 0 each step pule

on STEP input causes incrementing or decrementing of target position depending on polarity of DIR input.

For positive STEP_WIDTH, DIR = 0 causes incrementing and the DIR = 1 causes decrementing of the target

position. For negative STEP_WIDTH, DIR = 0 causes decrementing and DIR = 1 causes incrementing of the

target position. This is because the STEP_WIDTH is represented as a signed number.

4.2.5 Single Pin Interface

The TMC4671 can be operated in Motion Modes in which the main target value is calculated from either a

PWM input signal on PIN PWM_I or by analog input to AGPI_A.

Number Motion Mode Using PWM_I or AGPI_A

0 Stopped Mode no

1 Torque Mode no

2 Velocity Mode no

3 Position Mode no

4 PRBS Flux Mode no

5 PRBS Torque Mode no

6 PRBS Velocity Mode no

7 PRBS Position Mode no

8 UQ UD Ext Mode no

9 (reserved) no

10 AGPI_A Torque Mode AGPI_A

11 AGPI_A Velocity Mode AGPI_A

12 AGPI_A Position Mode AGPI_A

13 PWM_I Torque Mode PWM_I

14 PWM_I Velocity Mode PWM_I

15 PWM_I Position Mode PWM_I

Table 3: Single Pin Interface Motion Modes

Registers SINGLE_PIN_IF_OFFSET and SINGLE_PIN_IF_SCALE can be used to scale the value to desired range.

In case of the PWM input, a permanent low input signal or permanent high signal is treated as input error

and chosen target value is set to zero.

signal can be thereby suppressed. Bit 0 in register SINGLE_PIN_IF_STATUS is set high when PWM_I is

constant low, Bit 1 is set high when the PWM_I is constant high. Writing to this register resets these ﬂags.

Maximum PWM period of the PWM signal must be 65536 x 40 ns. The calculation of the normalized duty

cycle is started on the rising edge of PWM_I. The PWM frequency needs to be constant as big variations

(tolerance of 4 us in PWM period) in the PWM frequency are treated as error.

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