User Guide

Creating an FPGA Image DAT File
206 Appendix D: FPGA Support
WARNING!
When loading an FPGA Image onto the M6e-TC, the Verification process
checks the 16 most significant bits of the FPGA TM and TC version
numbers. To pass, the TM and TC versions must start with 0x1234xxxx
and 0x0010xxxx, respectively. When incrementing version numbers in
the Verilog/VHDL files be sure to only change the 16 least significant
bits.