Datasheet

T
T
T
S
S
S
6
6
6
4
4
4
M
M
M
L
L
L
S
S
S
6
6
6
4
4
4
V
V
V
8
8
8
F
F
F
2
2
2
168PIN PC100 Unbuffered DIMM
512MB With 32MX8 CL2
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
Refer to the individual component, not the whole module.
Parameter Symbol Min Max Unit Note
CLK cycle time
t
CC
10 1000
ns 1
CLK to valid output delay
t
SAC
- 6.0
ns 1, 2
Output data hold time
t
OH
3.0 -
ns 2
CLK high pulse width tCH 3.0 - ns 3
CLK low pulse width tCL 3.0 - ns 3
Input setup time tSS 2.0 - ns 3
Input hold time tSH 1.0 - ns 3
CLK to output in Low-Z tSLZ 1.0 - ns 2
CLK to output in Hi-Z
t
SHZ
-
6.0 ns
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf)= 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
Note:
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Transcend information Inc
8