Datasheet

ManualsBrandsTranscend Manualscomputer componentsTS64MLS64V8F2

168PIN PC100 Unbuffered DIMM

512MB With 32MX8 CL2

Description

The TS64MLS64V8F2 is a 64M bit x 64 Synchronous

Dynamic RAM high-density for PC-100. The

TS64MLS64V8F2 consists of 16pcs CMOS 32Mx8 bits

Synchronous DRAMs in TSOP-II 400mil packages and a

2048 bits serial EEPROM on a 168-pin printed circuit

board. The TS64MLS64V8F2 is a Dual In-Line Memory

Module and is intended for mounting into 168-pin edge

connector sockets.

Synchronous design allows precise cycle control with

the use of system clock. I/O transactions are possible on

every clock cycle. Range of operation frequencies,

programmable latencies allow the same device to be

useful for a variety of high bandwidth, high performance

memory system applications.

Features

• Performance Range: PC-100.

• Conformed to JEDEC Standard Spec.

• Burst Mode Operation.

• Auto and Self Refresh.

• CKE Power Down Mode.

• DQM Byte Masking (Read/Write)

• Serial Presence Detect (SPD) with serial EEPROM

• LVTTL compatible inputs and outputs.

• Single 3.3V ± 0.3V power supply.

• MRS cycle with address key programs.

Latency (Access from column address)

Burst Length (1,2,4,8 & Full Page)

Data Sequence (Sequential & Interleave)

• All inputs are sampled at the positive going edge of

the system clock.

Placement

PCB:09-7308

Transcend information Inc

Summary of content (11 pages)

PAGE 1
68PIN PC100 Unbuffered DIMM 512MB With 32MX8 CL2 TS64MLS64V8F2 Description Placement The TS64MLS64V8F2 is a 64M bit x 64 Synchronous Dynamic RAM high-density for PC-100. The TS64MLS64V8F2 consists of 16pcs CMOS 32Mx8 bits Synchronous DRAMs in TSOP-II 400mil packages and a 2048 bits serial EEPROM on a 168-pin printed circuit board. The TS64MLS64V8F2 is a Dual In-Line Memory Module and is intended for mounting into 168-pin edge connector sockets.
PAGE 2
168PIN PC100 Unbuffered DIMM 512MB With 32MX8 CL2 TS64MLS64V8F2 Pin Identification Dimensions Symbol Side Millimeters Inches A 133.35±0.40 5.250±0.016 B 65.67 2.585 C 23.49 0.925 D 8.89 0.350 E 3.00 0.118 F 29.21±0.20 1.150±0.008 G 19.80 0.788 H 15.80 0.622 I 1.27±0.10 0.050±0.
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168PIN PC100 Unbuffered DIMM 512MB With 32MX8 CL2 TS64MLS64V8F2 Pinouts: Pin Pin Pin Pin No Name No Name 01 Vss 43 Vss 02 DQ0 44 NC 03 DQ1 45 /CS2 04 DQ2 46 DQM2 05 DQ3 47 DQM3 06 Vcc 48 NC 07 DQ4 49 Vcc 08 DQ5 50 NC 09 DQ6 51 NC 10 DQ7 52 *C2 11 DQ8 53 *C3 12 Vss 54 Vss 13 DQ9 55 DQ16 14 DQ10 56 DQ17 15 DQ11 57 DQ18 16 DQ12 58 DQ19 17 DQ13 59 Vcc 18 Vcc 60 DQ20 19 DQ14 61 NC 20 DQ15 62 *Vref 21 *C0 63 *CKE1 22 *C1 64 Vss 23 Vss 65 DQ21 24 NC 66 DQ22 25 NC 67 DQ23 26 Vcc 68 Vss 27 /WE 69 DQ24 28 DQM0 70 DQ
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168PIN PC100 Unbuffered DIMM 512MB With 32MX8 CL2 TS64MLS64V8F2 Block Diagram CKE0 CKE /CAS /CAS /WE /WE /CS /CS CKE DQM1 DQM0 CKE /CAS /WE /CS CKE DQM2 DQM3 32Mx8 SDRAM CLK /CS0 /WE /CS /RAS 32Mx8 SDRAM DQM /WE /RAS 32Mx8 SDRAM CLK /CAS A0~A12, BA0,BA1 DQ0~DQ7 CLK /CAS 32Mx8 SDRAM A0~A12, BA0,BA1 DQ0~DQ7 DQM /RAS CLK /RAS A0~A12, BA0,BA1 DQ0~DQ7 /RAS DQM A0~A12, BA0,BA1 DQ0~DQ7 DQM A0~A12 BA0,BA1 DQ0~DQ63 /CS2 A0~A12, BA0,BA1 DQ0~DQ7 A0~A12, BA0,BA1 DQ0~DQ7 /RAS 3
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168PIN PC100 Unbuffered DIMM 512MB With 32MX8 CL2 TS64MLS64V8F2 ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on VDD supply to Vss Storage temperature Power dissipation Short circuit current Mean time between failure Temperature Humidity Burning Temperature Cycling Test Note: Symbol VIN, VOUT VDD, VDDQ TSTG PD IOS MTBF THB TC Value -1.0 ~ 4.6 -1.0 ~ 4.
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168PIN PC100 Unbuffered DIMM 512MB With 32MX8 CL2 TS64MLS64V8F2 CAPACITANCE (VDD = 3.3V, TA = 20°C, f = 1MHz, VREF = 1.
PAGE 7
168PIN PC100 Unbuffered DIMM 512MB With 32MX8 CL2 TS64MLS64V8F2 AC OPERATING TEST CONDITIONS (VDD = 3.3V,0.3V, TA = 0 to 70°C) Parameter AC Input levels (VIH/VIL) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition Value 2.4/0.4 1.4 tr/tf=1/1 1.4 See Fig. 2 Vtt=1.4V 3.3V 50 Ohm 1200 Ohm Output VOH (DC)=2.4V, IOH=-2mA VOL (DC)=0.4V, I OL=2mA Output Z0=50 Ohm 50pF 50pF 870 Ohm Unit V V ns V (Fig.
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168PIN PC100 Unbuffered DIMM 512MB With 32MX8 CL2 TS64MLS64V8F2 AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Refer to the individual component, not the whole module. Parameter Symbol Min Max Unit Note CLK cycle time tCC 10 1000 ns 1 CLK to valid output delay tSAC - 6.0 ns 1, 2 Output data hold time tOH 3.0 - ns 2 CLK high pulse width tCH 3.0 - ns 3 CLK low pulse width tCL 3.0 - ns 3 Input setup time tSS 2.0 - ns 3 Input hold time tSH 1.
PAGE 9
168PIN PC100 Unbuffered DIMM 512MB With 32MX8 CL2 TS64MLS64V8F2 SIMPLIFIED TRUTH TABLE COMMAND Register Mode Register Set Refresh Auto Refresh Entry Self Refresh Exit CKEn-1 CKEn (V=Valid, X=Don’t Care, H=Logic High, L=Logic Low) A11, A12 DQM BA0,1 A10/AP Note A0~A9 /CS /RAS /CAS /WE H X L L L L X OP CODE H H L L L L H X X L H L H H X H X H X X X H X L L H H X V H X L H L H X V H X L H L L X V H X L H H L X H X L L H L X Clock Suspend
PAGE 10
168PIN PC100 Unbuffered DIMM 512MB With 32MX8 CL2 TS64MLS64V8F2 SERIAL PRESENCE DETECT SPECIFICATION Serial Presence Detect Byte No. Function Described Standard Specification Vendor Part 0 # of Bytes Written into Serial Memory 128bytes 80 1 Total # of Bytes of S.P.
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168PIN PC100 Unbuffered DIMM 512MB With 32MX8 CL2 TS64MLS64V8F2 29 Minimum RAS to CAS Delay 20ns 14 30 Minimum RAS Pulse Width 50ns 32 31 Density of Each Bank on Module 1row of 256MB 40 32 Command/Address Setup Time 2.0ns 20 33 Command/Address Hold Time 1.0ns 10 34 Data Signal Setup Time 2.0ns 20 35 Data Signal Hold Time 1.